mirror of
https://github.com/RPCSX/llvm.git
synced 2024-11-24 20:29:53 +00:00
ARM: fix fast-isel assertion failure
Missing braces on if meant we inserted both ARM and Thumb load for a litpool entry. This didn't end well. rdar://problem/15959157 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200752 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
c55ee815d4
commit
284c931330
@ -653,13 +653,14 @@ unsigned ARMFastISel::ARMMaterializeInt(const Constant *C, MVT VT) {
|
||||
AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
|
||||
TII.get(ARM::t2LDRpci), DestReg)
|
||||
.addConstantPoolIndex(Idx));
|
||||
else
|
||||
else {
|
||||
// The extra immediate is for addrmode2.
|
||||
DestReg = constrainOperandRegClass(TII.get(ARM::LDRcp), DestReg, 0);
|
||||
AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
|
||||
TII.get(ARM::LDRcp), DestReg)
|
||||
.addConstantPoolIndex(Idx)
|
||||
.addImm(0));
|
||||
}
|
||||
|
||||
return DestReg;
|
||||
}
|
||||
|
11
test/CodeGen/ARM/fastisel-thumb-litpool.ll
Normal file
11
test/CodeGen/ARM/fastisel-thumb-litpool.ll
Normal file
@ -0,0 +1,11 @@
|
||||
; RUN: llc -mtriple=thumbv7-apple-ios -O0 -o - %s | FileCheck %s
|
||||
|
||||
; We used to accidentally create both an ARM and a Thumb ldr here. It led to an
|
||||
; assertion failure at the time, but could go all the way through to emission,
|
||||
; hence the CHECK-NOT.
|
||||
|
||||
define i32 @test_thumb_ldrlit() minsize {
|
||||
; CHECK: ldr r0, LCPI0_0
|
||||
; CHECK-NOT: ldr
|
||||
ret i32 12345678
|
||||
}
|
Loading…
Reference in New Issue
Block a user