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* Factor out (into new fn) a loop emitting operand shifts into the instruction
* Reverse instruction bit components for a LittleEndian-style encoding * Fix some comments and spacing git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16975 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -19,6 +19,58 @@
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#include "llvm/Support/Debug.h"
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using namespace llvm;
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void CodeEmitterGen::emitInstrOpBits(std::ostream &o,
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const std::vector<RecordVal> &Vals,
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std::map<std::string, unsigned> &OpOrder,
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std::map<std::string, bool> &OpContinuous)
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{
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for (unsigned f = 0, e = Vals.size(); f != e; ++f) {
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if (Vals[f].getPrefix()) {
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BitsInit *FieldInitializer = (BitsInit*)Vals[f].getValue();
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// Scan through the field looking for bit initializers of the current
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// variable...
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for (int i = FieldInitializer->getNumBits()-1; i >= 0; --i) {
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Init *I = FieldInitializer->getBit(i);
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if (BitInit *BI = dynamic_cast<BitInit*>(I)) {
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DEBUG(o << " // bit init: f: " << f << ", i: " << i << "\n");
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} else if (UnsetInit *UI = dynamic_cast<UnsetInit*>(I)) {
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DEBUG(o << " // unset init: f: " << f << ", i: " << i << "\n");
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} else if (VarBitInit *VBI = dynamic_cast<VarBitInit*>(I)) {
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TypedInit *TI = VBI->getVariable();
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if (VarInit *VI = dynamic_cast<VarInit*>(TI)) {
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// If the bits of the field are laid out consecutively in the
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// instruction, then instead of separately ORing in bits, just
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// mask and shift the entire field for efficiency.
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if (OpContinuous[VI->getName()]) {
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// already taken care of in the loop above, thus there is no
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// need to individually OR in the bits
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// for debugging, output the regular version anyway, commented
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DEBUG(o << " // Value |= getValueBit(op"
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<< OpOrder[VI->getName()] << ", " << VBI->getBitNum()
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<< ")" << " << " << i << ";\n");
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} else {
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o << " Value |= getValueBit(op" << OpOrder[VI->getName()]
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<< ", " << VBI->getBitNum()
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<< ")" << " << " << i << ";\n";
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}
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} else if (FieldInit *FI = dynamic_cast<FieldInit*>(TI)) {
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// FIXME: implement this!
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std::cerr << "Error: FieldInit not implemented!\n";
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abort();
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} else {
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std::cerr << "Error: unimplemented case in "
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<< "CodeEmitterGen::emitInstrOpBits()\n";
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abort();
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}
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}
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}
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}
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}
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}
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void CodeEmitterGen::run(std::ostream &o) {
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CodeGenTarget Target;
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std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
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@ -43,6 +95,24 @@ void CodeEmitterGen::run(std::ostream &o) {
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BitsInit *BI = R->getValueAsBitsInit("Inst");
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// For little-endian instruction bit encodings, reverse the bit order
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if (Target.isLittleEndianEncoding()) {
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unsigned numBits = BI->getNumBits();
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BitsInit *NewBI = new BitsInit(numBits);
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for (unsigned bit = 0, end = numBits / 2; bit != end; ++bit) {
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unsigned bitSwapIdx = numBits - bit - 1;
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Init *OrigBit = BI->getBit(bit);
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Init *BitSwap = BI->getBit(bitSwapIdx);
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NewBI->setBit(bit, BitSwap);
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NewBI->setBit(bitSwapIdx, OrigBit);
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}
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if (numBits % 2) {
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unsigned middle = (numBits + 1) / 2;
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NewBI->setBit(middle, BI->getBit(middle));
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}
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BI = NewBI;
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}
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unsigned Value = 0;
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const std::vector<RecordVal> &Vals = R->getValues();
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@ -61,17 +131,16 @@ void CodeEmitterGen::run(std::ostream &o) {
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DEBUG(o << " // " << *R->getValue("Inst") << "\n");
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o << " Value = " << Value << "U;\n\n";
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// Loop over all of the fields in the instruction determining which are the
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// Loop over all of the fields in the instruction, determining which are the
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// operands to the instruction.
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//
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unsigned op = 0;
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std::map<std::string, unsigned> OpOrder;
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std::map<std::string, bool> OpContinuous;
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for (unsigned i = 0, e = Vals.size(); i != e; ++i) {
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if (!Vals[i].getPrefix() && !Vals[i].getValue()->isComplete()) {
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if (!Vals[i].getPrefix() && !Vals[i].getValue()->isComplete()) {
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// Is the operand continuous? If so, we can just mask and OR it in
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// instead of doing it bit-by-bit, saving a lot in runtime cost.
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const BitsInit *InstInit = BI;
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BitsInit *InstInit = BI;
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int beginBitInVar = -1, endBitInVar = -1;
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int beginBitInInst = -1, endBitInInst = -1;
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bool continuous = true;
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@ -173,58 +242,19 @@ void CodeEmitterGen::run(std::ostream &o) {
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}
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}
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for (unsigned f = 0, e = Vals.size(); f != e; ++f) {
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if (Vals[f].getPrefix()) {
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BitsInit *FieldInitializer = (BitsInit*)Vals[f].getValue();
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// Scan through the field looking for bit initializers of the current
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// variable...
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for (int i = FieldInitializer->getNumBits()-1; i >= 0; --i) {
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Init *I = FieldInitializer->getBit(i);
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if (BitInit *BI = dynamic_cast<BitInit*>(I)) {
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DEBUG(o << " // bit init: f: " << f << ", i: " << i << "\n");
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} else if (UnsetInit *UI = dynamic_cast<UnsetInit*>(I)) {
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DEBUG(o << " // unset init: f: " << f << ", i: " << i << "\n");
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} else if (VarBitInit *VBI = dynamic_cast<VarBitInit*>(I)) {
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TypedInit *TI = VBI->getVariable();
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if (VarInit *VI = dynamic_cast<VarInit*>(TI)) {
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// If the bits of the field are laid out consecutively in the
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// instruction, then instead of separately ORing in bits, just
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// mask and shift the entire field for efficiency.
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if (OpContinuous[VI->getName()]) {
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// already taken care of in the loop above, thus there is no
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// need to individually OR in the bits
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// for debugging, output the regular version anyway, commented
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DEBUG(o << " // Value |= getValueBit(op"
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<< OpOrder[VI->getName()] << ", " << VBI->getBitNum()
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<< ")" << " << " << i << ";\n");
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} else {
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o << " Value |= getValueBit(op" << OpOrder[VI->getName()]
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<< ", " << VBI->getBitNum()
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<< ")" << " << " << i << ";\n";
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}
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} else if (FieldInit *FI = dynamic_cast<FieldInit*>(TI)) {
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// FIXME: implement this!
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o << "FIELD INIT not implemented yet!\n";
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} else {
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o << "Error: UNIMPLEMENTED\n";
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}
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}
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}
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}
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}
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emitInstrOpBits(o, Vals, OpOrder, OpContinuous);
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o << " break;\n"
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<< " }\n";
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}
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// Default case: unhandled opcode
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o << " default:\n"
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<< " std::cerr << \"Not supported instr: \" << MI << \"\\n\";\n"
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<< " abort();\n"
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<< " }\n"
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<< " return Value;\n"
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<< "}\n";
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<< "}\n\n";
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o << "} // End llvm namespace \n";
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}
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@ -15,9 +15,13 @@
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#define CODEMITTERGEN_H
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#include "TableGenBackend.h"
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#include <map>
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#include <vector>
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namespace llvm {
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class RecordVal;
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class CodeEmitterGen : public TableGenBackend {
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RecordKeeper &Records;
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public:
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@ -28,6 +32,10 @@ public:
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private:
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void emitMachineOpEmitter(std::ostream &o, const std::string &Namespace);
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void emitGetValueBit(std::ostream &o, const std::string &Namespace);
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void emitInstrOpBits(std::ostream &o,
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const std::vector<RecordVal> &Vals,
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std::map<std::string, unsigned> &OpOrder,
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std::map<std::string, bool> &OpContinuous);
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};
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} // End llvm namespace
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