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AArch64: make FastISel memcpy emission more robust.
We were hitting an assert if FastISel couldn't create the load or store we requested. Currently this happens for large frame-local addresses, though CodeGen could be improved there. rdar://problem/17187463 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210519 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1460,10 +1460,12 @@ bool AArch64FastISel::TryEmitSmallMemCpy(Address Dest, Address Src,
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bool RV;
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unsigned ResultReg;
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RV = EmitLoad(VT, ResultReg, Src);
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assert(RV == true && "Should be able to handle this load.");
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if (!RV)
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return false;
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RV = EmitStore(VT, ResultReg, Dest);
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assert(RV == true && "Should be able to handle this store.");
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(void)RV;
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if (!RV)
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return false;
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int64_t Size = VT.getSizeInBits() / 8;
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Len -= Size;
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@ -133,3 +133,12 @@ define void @t8() {
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call void @llvm.memcpy.p0i8.p0i8.i64(i8* getelementptr inbounds ([80 x i8]* @temp, i32 0, i32 0), i8* getelementptr inbounds ([80 x i8]* @message, i32 0, i32 0), i64 4, i32 1, i1 false)
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ret void
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}
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define void @test_distant_memcpy(i8* %dst) {
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; ARM64-LABEL: test_distant_memcpy:
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; ARM64: bl _memcpy
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%array = alloca i8, i32 8192
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%elem = getelementptr i8* %array, i32 8000
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call void @llvm.memcpy.p0i8.p0i8.i64(i8* %dst, i8* %elem, i64 4, i32 1, i1 false)
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ret void
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}
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