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AMDGPU/SI: Add verifier check for exec reads

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Make sure we aren't accidentally not setting
these in the instruction definitions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249170 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Matt Arsenault 2015-10-02 18:58:37 +00:00
parent 63a9180f3c
commit 29467e755f
2 changed files with 14 additions and 2 deletions
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10
lib/Target/AMDGPU/SIInstrInfo.cpp
View File

@ -1445,6 +1445,16 @@ bool SIInstrInfo::verifyInstruction(const MachineInstr *MI,
}
}
// Make sure we aren't losing exec uses in the td files. This mostly requires
// being careful when using let Uses to try to add other use registers.
if (!isGenericOpcode(Opcode) && !isSALU(Opcode) && !isSMRD(Opcode)) {
const MachineOperand *Exec = MI->findRegisterUseOperand(AMDGPU::EXEC);
if (!Exec || !Exec->isImplicit()) {
ErrInfo = "VALU instruction does not implicitly read exec mask";
return false;
}
}
return true;
}

6
lib/Target/AMDGPU/SIInstructions.td
View File

@ -1859,7 +1859,7 @@ let hasSideEffects = 0, mayLoad = 0, mayStore = 0, Uses = [EXEC] in {
def V_MOV_B64_PSEUDO : InstSI <(outs VReg_64:$dst), (ins VSrc_64:$src0), "", []>;
} // end let hasSideEffects = 0, mayLoad = 0, mayStore = 0
let hasSideEffects = 1 in {
let hasSideEffects = 1, SALU = 1 in {
def SGPR_USE : InstSI <(outs),(ins), "", []>;
}
@ -2062,7 +2062,9 @@ def SI_CONSTDATA_PTR : InstSI <
(outs SReg_64:$dst),
(ins),
"", [(set SReg_64:$dst, (i64 SIconstdata_ptr))]
>;
> {
let SALU = 1;
}
} // End Defs = [SCC]