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[WebAssembly] Minor code cleanups. NFC.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@257128 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman 2016-01-08 01:06:00 +00:00
parent 1087a1818f
commit 2c2e12150f
4 changed files with 6 additions and 11 deletions
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2
lib/Target/WebAssembly/CMakeLists.txt
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@ -40,5 +40,5 @@ add_llvm_target(WebAssemblyCodeGen
add_dependencies(LLVMWebAssemblyCodeGen intrinsics_gen)
add_subdirectory(InstPrinter)
add_subdirectory(TargetInfo)
add_subdirectory(MCTargetDesc)
add_subdirectory(TargetInfo)

6
lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h
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@ -19,20 +19,14 @@
namespace llvm {
class formatted_raw_ostream;
class MCAsmBackend;
class MCCodeEmitter;
class MCContext;
class MCInstrInfo;
class MCRegisterInfo;
class MCObjectWriter;
class MCStreamer;
class MCSubtargetInfo;
class MCTargetStreamer;
class StringRef;
class Target;
class Triple;
class raw_ostream;
class raw_pwrite_stream;
extern Target TheWebAssemblyTarget32;

6
lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
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@ -90,9 +90,9 @@ private:
MVT WebAssemblyAsmPrinter::getRegType(unsigned RegNo) const {
const TargetRegisterClass *TRC =
TargetRegisterInfo::isVirtualRegister(RegNo) ?
MRI->getRegClass(RegNo) :
MRI->getTargetRegisterInfo()->getMinimalPhysRegClass(RegNo);
TargetRegisterInfo::isVirtualRegister(RegNo)
? MRI->getRegClass(RegNo)
: MRI->getTargetRegisterInfo()->getMinimalPhysRegClass(RegNo);
for (MVT T : {MVT::i32, MVT::i64, MVT::f32, MVT::f64})
if (TRC->hasType(T))
return T;

3
lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
View File

@ -256,7 +256,8 @@ static void SortBlocks(MachineFunction &MF, const MachineLoopInfo &MLI) {
/// code) for a branch instruction to both branch to a block and fallthrough
/// to it, so we check the actual branch operands to see if there are any
/// explicit mentions.
static bool ExplicitlyBranchesTo(MachineBasicBlock *Pred, MachineBasicBlock *MBB) {
static bool ExplicitlyBranchesTo(MachineBasicBlock *Pred,
MachineBasicBlock *MBB) {
for (MachineInstr &MI : Pred->terminators())
for (MachineOperand &MO : MI.explicit_operands())
if (MO.isMBB() && MO.getMBB() == MBB)