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Revert "AArch64: Set shift bit of TLSLE HI12 add instruction"

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This reverts commit r282057 because it broke the buildbots - see e.g.
http://lab.llvm.org:8011/builders/clang-cmake-aarch64-42vma/builds/12063

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282058 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Diana Picus 2016-09-21 08:24:41 +00:00
parent 437db4fe24
commit 2c37c7740e
2 changed files with 0 additions and 18 deletions
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6
lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
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@ -263,12 +263,6 @@ AArch64MCCodeEmitter::getAddSubImmOpValue(const MCInst &MI, unsigned OpIdx,
++MCNumFixups;
// Set the shift bit of the add instruction for relocation types
// R_AARCH64_TLSLE_ADD_TPREL_HI12 and R_AARCH64_TLSLD_ADD_DTPREL_HI12.
AArch64MCExpr::VariantKind RefKind = cast<AArch64MCExpr>(Expr)->getKind();
if (RefKind == AArch64MCExpr::VK_TPREL_HI12 ||
RefKind == AArch64MCExpr::VK_DTPREL_HI12)
ShiftVal = 12;
return ShiftVal == 0 ? 0 : (1 << ShiftVal);
}

12
test/MC/AArch64/tls-add-shift.s
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@ -1,12 +0,0 @@
// RUN: llvm-mc -triple=aarch64-none-linux-gnu -filetype=obj < %s -o - | \
// RUN: llvm-objdump -r -d - | FileCheck %s
// TLS add TPREL
add x2, x1, #:tprel_hi12:var
// CHECK: add x2, x1, #0, lsl #12
// CHECK-NEXT: R_AARCH64_TLSLE_ADD_TPREL_HI12 var
// TLS add DTPREL
add x4, x3, #:dtprel_hi12:var
// CHECK: add x4, x3, #0, lsl #12
// CHECK-NEXT: R_AARCH64_TLSLD_ADD_DTPREL_HI12 var