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Replace a string comparison in ARMSubtarget.h with a tablegen entry in ARM.td (NFC)

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Reviewers: rengolin, t.p.northover

Subscribers: aemerson, llvm-commits, rengolin

Differential Revision: http://reviews.llvm.org/D18393

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264165 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Artyom Skrobov 2016-03-23 16:18:13 +00:00
parent 0905413218
commit 2d2221d7fb
2 changed files with 8 additions and 5 deletions
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6
lib/Target/ARM/ARM.td
View File

@ -278,6 +278,8 @@ def ProcR5 : SubtargetFeature<"r5", "ARMProcFamily", "CortexR5",
def ProcR7 : SubtargetFeature<"r7", "ARMProcFamily", "CortexR7", def ProcR7 : SubtargetFeature<"r7", "ARMProcFamily", "CortexR7",
"Cortex-R7 ARM processors", []>; "Cortex-R7 ARM processors", []>;
def ProcM3 : SubtargetFeature<"m3", "ARMProcFamily", "CortexM3",
"Cortex-M3 ARM processors", []>;
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// ARM schedules. // ARM schedules.
@ -641,8 +643,8 @@ def : ProcessorModel<"cortex-r8", CortexA8Model, [ARMv7r,
FeatureAvoidPartialCPSR, FeatureAvoidPartialCPSR,
FeatureT2XtPk]>; FeatureT2XtPk]>;
def : ProcNoItin<"cortex-m3", [ARMv7m]>; def : ProcNoItin<"cortex-m3", [ARMv7m, ProcM3]>;
def : ProcNoItin<"sc300", [ARMv7m]>; def : ProcNoItin<"sc300", [ARMv7m, ProcM3]>;
def : ProcNoItin<"cortex-m4", [ARMv7em, def : ProcNoItin<"cortex-m4", [ARMv7em,
FeatureVFP4, FeatureVFP4,

7
lib/Target/ARM/ARMSubtarget.h
View File

@ -43,8 +43,9 @@ class ARMSubtarget : public ARMGenSubtargetInfo {
protected: protected:
enum ARMProcFamilyEnum { enum ARMProcFamilyEnum {
Others, CortexA5, CortexA7, CortexA8, CortexA9, CortexA12, CortexA15, Others, CortexA5, CortexA7, CortexA8, CortexA9, CortexA12, CortexA15,
CortexA17, CortexR4, CortexR4F, CortexR5, CortexR7, CortexA32, CortexA35, CortexA17, CortexR4, CortexR4F, CortexR5, CortexR7, CortexM3,
CortexA53, CortexA57, CortexA72, Krait, Swift, ExynosM1 CortexA32, CortexA35, CortexA53, CortexA57, CortexA72,
Krait, Swift, ExynosM1
}; };
enum ARMProcClassEnum { enum ARMProcClassEnum {
None, AClass, RClass, MClass None, AClass, RClass, MClass
@ -334,7 +335,7 @@ public:
bool isCortexA9() const { return ARMProcFamily == CortexA9; } bool isCortexA9() const { return ARMProcFamily == CortexA9; }
bool isCortexA15() const { return ARMProcFamily == CortexA15; } bool isCortexA15() const { return ARMProcFamily == CortexA15; }
bool isSwift() const { return ARMProcFamily == Swift; } bool isSwift() const { return ARMProcFamily == Swift; }
bool isCortexM3() const { return CPUString == "cortex-m3"; } bool isCortexM3() const { return ARMProcFamily == CortexM3; }
bool isLikeA9() const { return isCortexA9() || isCortexA15() || isKrait(); } bool isLikeA9() const { return isCortexA9() || isCortexA15() || isKrait(); }
bool isCortexR5() const { return ARMProcFamily == CortexR5; } bool isCortexR5() const { return ARMProcFamily == CortexR5; }
bool isKrait() const { return ARMProcFamily == Krait; } bool isKrait() const { return ARMProcFamily == Krait; }