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[X86][AVX] Fixed v16i16/v32i8 ADD/SUB costs on AVX1 subtargets
Add explicit v16i16/v32i8 ADD/SUB costs, matching the costs of v4i64/v8i32 - they were missing for some reason. This has side effects on the LV max bandwidth tests (AVX1 now prefers 128-bit vectors vs AVX2 which still prefers 256-bit) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286832 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -526,6 +526,10 @@ int X86TTIImpl::getArithmeticInstrCost(
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// Two ops + 1 extract + 1 insert = 4.
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{ ISD::MUL, MVT::v16i16, 4 },
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{ ISD::MUL, MVT::v8i32, 4 },
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{ ISD::SUB, MVT::v32i8, 4 },
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{ ISD::ADD, MVT::v32i8, 4 },
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{ ISD::SUB, MVT::v16i16, 4 },
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{ ISD::ADD, MVT::v16i16, 4 },
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{ ISD::SUB, MVT::v8i32, 4 },
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{ ISD::ADD, MVT::v8i32, 4 },
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{ ISD::SUB, MVT::v4i64, 4 },
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@ -57,13 +57,13 @@ define i32 @add(i32 %arg) {
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%G = add <8 x i16> undef, undef
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; SSSE3: cost of 2 {{.*}} %H = add
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; SSE42: cost of 2 {{.*}} %H = add
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; AVX: cost of 2 {{.*}} %H = add
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; AVX: cost of 4 {{.*}} %H = add
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; AVX2: cost of 1 {{.*}} %H = add
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; AVX512: cost of 1 {{.*}} %H = add
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%H = add <16 x i16> undef, undef
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; SSSE3: cost of 4 {{.*}} %I = add
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; SSE42: cost of 4 {{.*}} %I = add
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; AVX: cost of 4 {{.*}} %I = add
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; AVX: cost of 8 {{.*}} %I = add
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; AVX2: cost of 2 {{.*}} %I = add
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; AVX512F: cost of 2 {{.*}} %I = add
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; AVX512BW: cost of 1 {{.*}} %I = add
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@ -77,13 +77,13 @@ define i32 @add(i32 %arg) {
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%J = add <16 x i8> undef, undef
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; SSSE3: cost of 2 {{.*}} %K = add
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; SSE42: cost of 2 {{.*}} %K = add
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; AVX: cost of 2 {{.*}} %K = add
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; AVX: cost of 4 {{.*}} %K = add
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; AVX2: cost of 1 {{.*}} %K = add
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; AVX512: cost of 1 {{.*}} %K = add
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%K = add <32 x i8> undef, undef
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; SSSE3: cost of 4 {{.*}} %L = add
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; SSE42: cost of 4 {{.*}} %L = add
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; AVX: cost of 4 {{.*}} %L = add
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; AVX: cost of 8 {{.*}} %L = add
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; AVX2: cost of 2 {{.*}} %L = add
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; AVX512F: cost of 2 {{.*}} %L = add
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; AVX512BW: cost of 1 {{.*}} %L = add
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@ -140,13 +140,13 @@ define i32 @sub(i32 %arg) {
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%G = sub <8 x i16> undef, undef
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; SSSE3: cost of 2 {{.*}} %H = sub
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; SSE42: cost of 2 {{.*}} %H = sub
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; AVX: cost of 2 {{.*}} %H = sub
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; AVX: cost of 4 {{.*}} %H = sub
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; AVX2: cost of 1 {{.*}} %H = sub
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; AVX512: cost of 1 {{.*}} %H = sub
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%H = sub <16 x i16> undef, undef
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; SSSE3: cost of 4 {{.*}} %I = sub
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; SSE42: cost of 4 {{.*}} %I = sub
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; AVX: cost of 4 {{.*}} %I = sub
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; AVX: cost of 8 {{.*}} %I = sub
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; AVX2: cost of 2 {{.*}} %I = sub
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; AVX512F: cost of 2 {{.*}} %I = sub
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; AVX512BW: cost of 1 {{.*}} %I = sub
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@ -160,13 +160,13 @@ define i32 @sub(i32 %arg) {
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%J = sub <16 x i8> undef, undef
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; SSSE3: cost of 2 {{.*}} %K = sub
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; SSE42: cost of 2 {{.*}} %K = sub
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; AVX: cost of 2 {{.*}} %K = sub
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; AVX: cost of 4 {{.*}} %K = sub
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; AVX2: cost of 1 {{.*}} %K = sub
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; AVX512: cost of 1 {{.*}} %K = sub
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%K = sub <32 x i8> undef, undef
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; SSSE3: cost of 4 {{.*}} %L = sub
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; SSE42: cost of 4 {{.*}} %L = sub
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; AVX: cost of 4 {{.*}} %L = sub
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; AVX: cost of 8 {{.*}} %L = sub
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; AVX2: cost of 2 {{.*}} %L = sub
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; AVX512F: cost of 2 {{.*}} %L = sub
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; AVX512BW: cost of 1 {{.*}} %L = sub
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@ -1,4 +1,5 @@
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; RUN: opt -loop-vectorize -vectorizer-maximize-bandwidth -mcpu=corei7-avx -debug-only=loop-vectorize -S < %s 2>&1 | FileCheck %s
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; RUN: opt -loop-vectorize -vectorizer-maximize-bandwidth -mcpu=corei7-avx -debug-only=loop-vectorize -S < %s 2>&1 | FileCheck %s --check-prefix=CHECK-AVX1
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; RUN: opt -loop-vectorize -vectorizer-maximize-bandwidth -mcpu=core-avx2 -debug-only=loop-vectorize -S < %s 2>&1 | FileCheck %s --check-prefix=CHECK-AVX2
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; REQUIRES: asserts
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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@ -16,7 +17,8 @@ target triple = "x86_64-unknown-linux-gnu"
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; -vectorizer-maximize-bandwidth is indicated.
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;
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; CHECK-label: foo
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; CHECK: LV: Selecting VF: 32.
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; CHECK-AVX1: LV: Selecting VF: 16.
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; CHECK-AVX2: LV: Selecting VF: 32.
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define void @foo() {
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entry:
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br label %for.body
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