From 304e707e8e09edceb4a5eb1d3270e9319dcbfc96 Mon Sep 17 00:00:00 2001 From: Ruchira Sasanka Date: Tue, 8 Jan 2002 16:31:28 +0000 Subject: [PATCH] *** empty log message *** git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1501 91177308-0d34-0410-b5e6-96231b3b80d8 --- docs/RegisterAllocatorInfo.txt | 19 +++++++++++++++++-- 1 file changed, 17 insertions(+), 2 deletions(-) diff --git a/docs/RegisterAllocatorInfo.txt b/docs/RegisterAllocatorInfo.txt index 58a54505c16..446ffa1efad 100644 --- a/docs/RegisterAllocatorInfo.txt +++ b/docs/RegisterAllocatorInfo.txt @@ -173,10 +173,25 @@ allocation (e.g., caller saving code) 7. Furture work ---------------- +=============== If it is necessary to port the register allocator to another architecture than Sparc, only the target specific code in ../lib/Target/Sparc needs to be rewritten. Methods defined in class MachineRegInfo must be provided for the new architecure. -using ReservedColorList in RegClass \ No newline at end of file +7.1 Using ReservedColorList in RegClass +---------------------------------------- +The register allocator allows reserving a set of registers - i.e. the reserved +registers are not used by the register allocator. Currently, there are no +reserved registers. It it is necessary to make some registers unavailable to +a particular method, this feature will become handy. To do that, the reserved +register list must be passed to the register allocator. See PhyRegAlloc.cpp + + +7.2 %g registers on Sparc +------------------------- +Currently, %g registers are not allocated on Sparc. If it is necessary to +allocate these %g registers, the enumeration of registers in SparcIntRegClass +in SparcRegClassInfo.h must be changed. %g registers can be easily added as +volatile registers just by moving them above in the eneumeration - see +SparcRegClassInfo.h