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Add test for pinsrd and pinsrb instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76840 91177308-0d34-0410-b5e6-96231b3b80d8
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test/CodeGen/X86/vec_insert-4.ll
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12
test/CodeGen/X86/vec_insert-4.ll
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; RUN: llvm-as < %s | llc -march=x86 -mattr=sse41 | grep pinsrd | count 1
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; RUN: llvm-as < %s | llc -march=x86 -mattr=sse41 | grep pinsrb | count 1
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define <4 x i32> @t1(i32 %s, <4 x i32> %tmp) nounwind {
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%tmp1 = insertelement <4 x i32> %tmp, i32 %s, i32 1
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ret <4 x i32> %tmp1
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}
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define <16 x i8> @t2(i8 %s, <16 x i8> %tmp) nounwind {
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%tmp1 = insertelement <16 x i8> %tmp, i8 %s, i32 1
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ret <16 x i8> %tmp1
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}
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