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Add a Subtarget feature 'v8fp' to the ARM backend.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185073 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Joey Gouly 2013-06-27 11:49:26 +00:00
parent 88d93a7cc4
commit 31d2f08f88
7 changed files with 36 additions and 5 deletions
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2
docs/CompilerWriterInfo.rst
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@ -20,6 +20,8 @@ ARM
* `ABI <http://www.arm.com/products/DevTools/ABI.html>`_
* `ABI Addenda and Errata <http://infocenter.arm.com/help/topic/com.arm.doc.ihi0045d/IHI0045D_ABI_addenda.pdf>`_
* `ARM C Language Extensions <http://infocenter.arm.com/help/topic/com.arm.doc.ihi0053a/IHI0053A_acle.pdf>`_
AArch64

3
lib/Target/ARM/ARM.td
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@ -45,6 +45,9 @@ def FeatureFP16 : SubtargetFeature<"fp16", "HasFP16", "true",
def FeatureVFP4 : SubtargetFeature<"vfp4", "HasVFPv4", "true",
"Enable VFP4 instructions",
[FeatureVFP3, FeatureFP16]>;
def FeatureV8FP : SubtargetFeature<"v8fp", "HasV8FP",
"true", "Enable ARMv8 FP",
[FeatureVFP4]>;
def FeatureD16 : SubtargetFeature<"d16", "HasD16", "true",
"Restrict VFP3 to 16 double registers">;
def FeatureHWDiv : SubtargetFeature<"hwdiv", "HasHardwareDivide", "true",

18
lib/Target/ARM/ARMAsmPrinter.cpp
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@ -781,8 +781,14 @@ void ARMAsmPrinter::emitAttributes() {
emitFPU = false;
}
/* VFPv4 + .fpu */
if (Subtarget->hasVFP4()) {
/* V8FP + .fpu */
if (Subtarget->hasV8FP()) {
AttrEmitter->EmitAttribute(ARMBuildAttrs::VFP_arch,
ARMBuildAttrs::AllowV8FPA);
if (emitFPU)
AttrEmitter->EmitTextAttribute(ARMBuildAttrs::VFP_arch, "v8fp");
/* VFPv4 + .fpu */
} else if (Subtarget->hasVFP4()) {
AttrEmitter->EmitAttribute(ARMBuildAttrs::VFP_arch,
ARMBuildAttrs::AllowFPv4A);
if (emitFPU)
@ -806,8 +812,12 @@ void ARMAsmPrinter::emitAttributes() {
/* TODO: ARMBuildAttrs::Allowed is not completely accurate,
* since NEON can have 1 (allowed) or 2 (MAC operations) */
if (Subtarget->hasNEON()) {
AttrEmitter->EmitAttribute(ARMBuildAttrs::Advanced_SIMD_arch,
ARMBuildAttrs::Allowed);
if (Subtarget->hasV8Ops())
AttrEmitter->EmitAttribute(ARMBuildAttrs::Advanced_SIMD_arch,
ARMBuildAttrs::AllowedNeonV8);
else
AttrEmitter->EmitAttribute(ARMBuildAttrs::Advanced_SIMD_arch,
ARMBuildAttrs::Allowed);
}
// Signal various FP modes.

3
lib/Target/ARM/ARMBuildAttrs.h
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@ -106,6 +106,7 @@ namespace ARMBuildAttrs {
//ARMISAUse (=8), uleb128 and THUMBISAUse (=9), uleb128
Not_Allowed = 0,
Allowed = 1,
AllowedNeonV8 = 3,
// FP_arch (=10), uleb128 (formerly Tag_VFP_arch = 10)
AllowFPv2 = 2, // v2 FP ISA permitted (implies use of the v1 FP ISA)
@ -113,6 +114,8 @@ namespace ARMBuildAttrs {
AllowFPv3B = 4, // v3 FP ISA permitted, but only D0-D15, S0-S31
AllowFPv4A = 5, // v4 FP ISA permitted (implies use of v3 FP ISA)
AllowFPv4B = 6, // v4 FP ISA was permitted, but only D0-D15, S0-S31
AllowV8FPA = 7, // Use of the ARM v8-A FP ISA was permitted
AllowV8FPB = 8, // Use of the ARM v8-A FP ISA was permitted, but only D0-D15, S0-S31
// Tag_WMMX_arch, (=11), uleb128
AllowThumb32 = 2, // 32-bit Thumb (implies 16-bit instructions)

1
lib/Target/ARM/ARMSubtarget.cpp
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@ -81,6 +81,7 @@ void ARMSubtarget::initializeEnvironment() {
HasVFPv2 = false;
HasVFPv3 = false;
HasVFPv4 = false;
HasV8FP = false;
HasNEON = false;
UseNEONForSinglePrecisionFP = false;
UseMulOps = UseFusedMulOps;

4
lib/Target/ARM/ARMSubtarget.h
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@ -48,11 +48,12 @@ protected:
bool HasV7Ops;
bool HasV8Ops;
/// HasVFPv2, HasVFPv3, HasVFPv4, HasNEON - Specify what
/// HasVFPv2, HasVFPv3, HasVFPv4, HasV8FP, HasNEON - Specify what
/// floating point ISAs are supported.
bool HasVFPv2;
bool HasVFPv3;
bool HasVFPv4;
bool HasV8FP;
bool HasNEON;
/// UseNEONForSinglePrecisionFP - if the NEONFP attribute has been
@ -249,6 +250,7 @@ public:
bool hasVFP2() const { return HasVFPv2; }
bool hasVFP3() const { return HasVFPv3; }
bool hasVFP4() const { return HasVFPv4; }
bool hasV8FP() const { return HasV8FP; }
bool hasNEON() const { return HasNEON; }
bool useNEONForSinglePrecisionFP() const {
return hasNEON() && UseNEONForSinglePrecisionFP; }

10
test/CodeGen/ARM/2010-09-29-mc-asm-header-test.ll
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@ -1,6 +1,8 @@
; RUN: llc < %s -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=V7
; RUN: llc < %s -mtriple=armv8-linux-gnueabi | FileCheck %s --check-prefix=V8
; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi | FileCheck %s --check-prefix=Vt8
; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=+v8fp | FileCheck %s --check-prefix=V8-V8FP
; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=+neon | FileCheck %s --check-prefix=V8-NEON
; This tests that MC/asm header conversion is smooth
;
; V7: .syntax unified
@ -17,6 +19,14 @@
; Vt8: .syntax unified
; Vt8: .eabi_attribute 6, 14
; V8-V8FP: .syntax unified
; V8-V8FP: .eabi_attribute 6, 14
; V8-V8FP: .eabi_attribute 10, 7
; V8-NEON: .syntax unified
; V8-NEON: .eabi_attribute 6, 14
; V8-NEON: .eabi_attribute 12, 3
define i32 @f(i64 %z) {
ret i32 0
}