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Use movw/movt instead of constant pool loads to lower byval parameter copies
Summary: The ARM backend can use a loop to implement copying byval parameters before a call. In non-thumb2 mode it uses a constant pool load to materialize the trip count. For targets that need movt instead (e.g. Native Client), use the same code as in thumb2 mode to materialize the trip count. Reviewers: jfb, t.p.northover Differential Revision: http://reviews.llvm.org/D8442 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233324 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -7105,16 +7105,20 @@ ARMTargetLowering::EmitStructByval(MachineInstr *MI,
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// Load an immediate to varEnd.
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unsigned varEnd = MRI.createVirtualRegister(TRC);
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if (IsThumb2) {
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if (Subtarget->useMovt(*MF)) {
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unsigned Vtmp = varEnd;
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if ((LoopSize & 0xFFFF0000) != 0)
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Vtmp = MRI.createVirtualRegister(TRC);
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AddDefaultPred(BuildMI(BB, dl, TII->get(ARM::t2MOVi16), Vtmp)
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.addImm(LoopSize & 0xFFFF));
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AddDefaultPred(BuildMI(BB, dl,
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TII->get(IsThumb2 ? ARM::t2MOVi16 : ARM::MOVi16),
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Vtmp).addImm(LoopSize & 0xFFFF));
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if ((LoopSize & 0xFFFF0000) != 0)
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AddDefaultPred(BuildMI(BB, dl, TII->get(ARM::t2MOVTi16), varEnd)
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.addReg(Vtmp).addImm(LoopSize >> 16));
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AddDefaultPred(BuildMI(BB, dl,
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TII->get(IsThumb2 ? ARM::t2MOVTi16 : ARM::MOVTi16),
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varEnd)
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.addReg(Vtmp)
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.addImm(LoopSize >> 16));
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} else {
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MachineConstantPool *ConstantPool = MF->getConstantPool();
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Type *Int32Ty = Type::getInt32Ty(MF->getFunction()->getContext());
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@ -1,5 +1,9 @@
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; RUN: llc < %s -mtriple=armv7-apple-ios6.0 | FileCheck %s
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; RUN: llc < %s -mtriple=thumbv7-apple-ios6.0 | FileCheck %s -check-prefix=THUMB
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; RUN: llc < %s -mtriple=armv7-unknown-nacl-gnueabi | FileCheck %s -check-prefix=NACL
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; RUN: llc < %s -mtriple=armv5-none-linux-gnueabi | FileCheck %s -check-prefix=NOMOVT
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; NOMOVT-NOT: movt
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; rdar://9877866
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%struct.SmallStruct = type { i32, [8 x i32], [37 x i8] }
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@ -33,6 +37,14 @@ entry:
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; THUMB: sub
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; THUMB: str
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; THUMB: bne
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; NACL-LABEL: g:
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; Ensure that use movw instead of constpool for the loop trip count. But don't
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; match the __stack_chk_guard movw
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; NACL: movw r{{[1-9]}}, #
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; NACL: ldr
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; NACL: sub
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; NACL: str
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; NACL: bne
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%st = alloca %struct.LargeStruct, align 4
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%call = call i32 @e2(%struct.LargeStruct* byval %st)
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ret i32 0
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@ -51,6 +63,11 @@ entry:
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; THUMB: sub
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; THUMB: vst1
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; THUMB: bne
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; NACL: movw r{{[1-9]}}, #
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; NACL: vld1
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; NACL: sub
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; NACL: vst1
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; NACL: bne
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%st = alloca %struct.LargeStruct, align 16
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%call = call i32 @e3(%struct.LargeStruct* byval align 16 %st)
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ret i32 0
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