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Move isUnpredicatedTerminator() default implementation to TargetInstrInfoImpl to break Target's dependency on CodeGen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146247 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -535,7 +535,7 @@ public:
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/// isUnpredicatedTerminator - Returns true if the instruction is a
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/// terminator instruction that has not been predicated.
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virtual bool isUnpredicatedTerminator(const MachineInstr *MI) const;
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virtual bool isUnpredicatedTerminator(const MachineInstr *MI) const = 0;
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/// PredicateInstruction - Convert the instruction into a predicated
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/// instruction. It returns true if the operation was successful.
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@ -814,6 +814,7 @@ public:
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virtual bool hasStoreToStackSlot(const MachineInstr *MI,
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const MachineMemOperand *&MMO,
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int &FrameIndex) const;
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virtual bool isUnpredicatedTerminator(const MachineInstr *MI) const;
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virtual bool PredicateInstruction(MachineInstr *MI,
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const SmallVectorImpl<MachineOperand> &Pred) const;
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virtual void reMaterialize(MachineBasicBlock &MBB,
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@ -139,6 +139,19 @@ bool TargetInstrInfoImpl::findCommutedOpIndices(MachineInstr *MI,
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}
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bool
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TargetInstrInfoImpl::isUnpredicatedTerminator(const MachineInstr *MI) const {
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if (!MI->isTerminator()) return false;
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// Conditional branch is a special case.
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if (MI->isBranch() && !MI->isBarrier())
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return true;
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if (!MI->isPredicable())
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return true;
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return !isPredicated(MI);
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}
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bool TargetInstrInfoImpl::PredicateInstruction(MachineInstr *MI,
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const SmallVectorImpl<MachineOperand> &Pred) const {
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bool MadeChange = false;
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@ -129,18 +129,6 @@ void TargetInstrInfo::insertNoop(MachineBasicBlock &MBB,
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}
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bool TargetInstrInfo::isUnpredicatedTerminator(const MachineInstr *MI) const {
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if (!MI->isTerminator()) return false;
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// Conditional branch is a special case.
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if (MI->isBranch() && !MI->isBarrier())
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return true;
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if (!MI->isPredicable())
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return true;
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return !isPredicated(MI);
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}
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/// Measure the specified inline asm to determine an approximation of its
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/// length.
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/// Comments (which run till the next SeparatorString or newline) do not
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