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CodeGen: silence a warning
GCC 4.8.2 objects to the tautological condition in the assert as the unsigned value is guaranteed to be >= 0. Simplify the assertion by dropping the tautological condition. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214671 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -144,8 +144,7 @@ MachineCombiner::getDepth(SmallVectorImpl<MachineInstr *> &InsInstrs,
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InstrIdxForVirtReg.find(MO.getReg());
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if (II != InstrIdxForVirtReg.end()) {
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// Operand is new virtual register not in trace
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assert(II->second >= 0 && II->second < InstrDepth.size() &&
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"Bad Index");
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assert(II->second < InstrDepth.size() && "Bad Index");
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MachineInstr *DefInstr = InsInstrs[II->second];
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assert(DefInstr &&
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"There must be a definition for a new virtual register");
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