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[InstCombine] Add test cases to show missing support for vectors in an OR combine. Also add the commuted versions. NFC

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299820 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper 2017-04-09 06:12:36 +00:00
parent 6fd8f78410
commit 35b55965c4
1 changed files with 42 additions and 0 deletions
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test/Transforms/InstCombine/and.ll
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@ -417,6 +417,48 @@ define i32 @test33(i32 %b) {
ret i32 %tmp.13
}
define i32 @test33b(i32 %b) {
; CHECK-LABEL: @test33b(
; CHECK-NEXT: [[TMP_13:%.*]] = xor i32 [[B:%.*]], 1
; CHECK-NEXT: ret i32 [[TMP_13]]
;
%tmp.4.mask = and i32 %b, 1
%tmp.10 = xor i32 %tmp.4.mask, 1
%tmp.12 = and i32 %b, -2
%tmp.13 = or i32 %tmp.10, %tmp.12
ret i32 %tmp.13
}
define <2 x i32> @test33vec(<2 x i32> %b) {
; CHECK-LABEL: @test33vec(
; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i32> [[B:%.*]], <i32 1, i32 1>
; CHECK-NEXT: [[TMP_10:%.*]] = and <2 x i32> [[TMP1]], <i32 1, i32 1>
; CHECK-NEXT: [[TMP_12:%.*]] = and <2 x i32> [[B]], <i32 -2, i32 -2>
; CHECK-NEXT: [[TMP_13:%.*]] = or <2 x i32> [[TMP_12]], [[TMP_10]]
; CHECK-NEXT: ret <2 x i32> [[TMP_13]]
;
%tmp.4.mask = and <2 x i32> %b, <i32 1, i32 1>
%tmp.10 = xor <2 x i32> %tmp.4.mask, <i32 1, i32 1>
%tmp.12 = and <2 x i32> %b, <i32 -2, i32 -2>
%tmp.13 = or <2 x i32> %tmp.12, %tmp.10
ret <2 x i32> %tmp.13
}
define <2 x i32> @test33vecb(<2 x i32> %b) {
; CHECK-LABEL: @test33vecb(
; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i32> [[B:%.*]], <i32 1, i32 1>
; CHECK-NEXT: [[TMP_10:%.*]] = and <2 x i32> [[TMP1]], <i32 1, i32 1>
; CHECK-NEXT: [[TMP_12:%.*]] = and <2 x i32> [[B]], <i32 -2, i32 -2>
; CHECK-NEXT: [[TMP_13:%.*]] = or <2 x i32> [[TMP_10]], [[TMP_12]]
; CHECK-NEXT: ret <2 x i32> [[TMP_13]]
;
%tmp.4.mask = and <2 x i32> %b, <i32 1, i32 1>
%tmp.10 = xor <2 x i32> %tmp.4.mask, <i32 1, i32 1>
%tmp.12 = and <2 x i32> %b, <i32 -2, i32 -2>
%tmp.13 = or <2 x i32> %tmp.10, %tmp.12
ret <2 x i32> %tmp.13
}
define i32 @test34(i32 %A, i32 %B) {
; CHECK-LABEL: @test34(
; CHECK-NEXT: ret i32 %B