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Update tests to use FileCheck

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84282 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Mon P Wang 2009-10-16 22:09:05 +00:00
parent 70bf40d02e
commit 362b8f2786
19 changed files with 70 additions and 55 deletions
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10
test/CodeGen/X86/widen_arith-1.ll
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@ -1,14 +1,12 @@
; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t ; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s
; RUN: grep paddb %t | count 1
; RUN: grep pextrb %t | count 1
; RUN: not grep pextrw %t
; Widen a v3i8 to v16i8 to use a vector add ; Widen a v3i8 to v16i8 to use a vector add
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
define void @update(<3 x i8>* %dst, <3 x i8>* %src, i32 %n) nounwind { define void @update(<3 x i8>* %dst, <3 x i8>* %src, i32 %n) nounwind {
entry: entry:
; CHECK-NOT: pextrw
; CHECK: paddb
; CHECK: pextrb
%dst.addr = alloca <3 x i8>* ; <<3 x i8>**> [#uses=2] %dst.addr = alloca <3 x i8>* ; <<3 x i8>**> [#uses=2]
%src.addr = alloca <3 x i8>* ; <<3 x i8>**> [#uses=2] %src.addr = alloca <3 x i8>* ; <<3 x i8>**> [#uses=2]
%n.addr = alloca i32 ; <i32*> [#uses=2] %n.addr = alloca i32 ; <i32*> [#uses=2]

7
test/CodeGen/X86/widen_arith-2.ll
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@ -1,9 +1,8 @@
; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t ; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s
; RUN: grep paddb %t | count 1 ; CHECK: paddb
; RUN: grep pand %t | count 1 ; CHECK: pand
; widen v8i8 to v16i8 (checks even power of 2 widening with add & and) ; widen v8i8 to v16i8 (checks even power of 2 widening with add & and)
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
define void @update(i64* %dst_i, i64* %src_i, i32 %n) nounwind { define void @update(i64* %dst_i, i64* %src_i, i32 %n) nounwind {
entry: entry:

10
test/CodeGen/X86/widen_arith-3.ll
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@ -1,12 +1,10 @@
; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t ; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s
; RUN: grep paddw %t | count 1 ; CHECK: paddw
; RUN: grep movd %t | count 2 ; CHECK: movd
; RUN: grep pextrw %t | count 1 ; CHECK: pextrw
; Widen a v3i16 to v8i16 to do a vector add ; Widen a v3i16 to v8i16 to do a vector add
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i686-apple-darwin10.0.0d2"
@.str = internal constant [4 x i8] c"%d \00" ; <[4 x i8]*> [#uses=1] @.str = internal constant [4 x i8] c"%d \00" ; <[4 x i8]*> [#uses=1]
@.str1 = internal constant [2 x i8] c"\0A\00" ; <[2 x i8]*> [#uses=1] @.str1 = internal constant [2 x i8] c"\0A\00" ; <[2 x i8]*> [#uses=1]

8
test/CodeGen/X86/widen_arith-4.ll
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@ -1,11 +1,9 @@
; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t ; RUN: llc < %s -march=x86-64 -mattr=+sse42 -disable-mmx | FileCheck %s
; RUN: grep psubw %t | count 1 ; CHECK: psubw
; RUN: grep pmullw %t | count 1 ; CHECK-NEXT: pmullw
; Widen a v5i16 to v8i16 to do a vector sub and multiple ; Widen a v5i16 to v8i16 to do a vector sub and multiple
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
define void @update(<5 x i16>* %dst, <5 x i16>* %src, i32 %n) nounwind { define void @update(<5 x i16>* %dst, <5 x i16>* %src, i32 %n) nounwind {
entry: entry:
%dst.addr = alloca <5 x i16>* ; <<5 x i16>**> [#uses=2] %dst.addr = alloca <5 x i16>* ; <<5 x i16>**> [#uses=2]

9
test/CodeGen/X86/widen_arith-5.ll
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@ -1,10 +1,9 @@
; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t ; RUN: llc < %s -march=x86-64 -mattr=+sse42 -disable-mmx | FileCheck %s
; RUN: grep pmulld %t | count 1 ; CHECK: movaps
; RUN: grep psubd %t | count 1 ; CHECK: pmulld
; RUN: grep movaps %t | count 1 ; CHECK: psubd
; widen a v3i32 to v4i32 to do a vector multiple and a subtraction ; widen a v3i32 to v4i32 to do a vector multiple and a subtraction
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
define void @update(<3 x i32>* %dst, <3 x i32>* %src, i32 %n) nounwind { define void @update(<3 x i32>* %dst, <3 x i32>* %src, i32 %n) nounwind {
entry: entry:

7
test/CodeGen/X86/widen_arith-6.ll
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@ -1,9 +1,8 @@
; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t ; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s
; RUN: grep mulps %t | count 1 ; CHECK: mulps
; RUN: grep addps %t | count 1 ; CHECK: addps
; widen a v3f32 to vfi32 to do a vector multiple and an add ; widen a v3f32 to vfi32 to do a vector multiple and an add
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
define void @update(<3 x float>* %dst, <3 x float>* %src, i32 %n) nounwind { define void @update(<3 x float>* %dst, <3 x float>* %src, i32 %n) nounwind {
entry: entry:

8
test/CodeGen/X86/widen_cast-1.ll
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@ -1,7 +1,7 @@
; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t ; RUN: llc -march=x86 -mattr=+sse42 < %s -disable-mmx | FileCheck %s
; RUN: grep paddw %t | count 1 ; CHECK: paddw
; RUN: grep movd %t | count 1 ; CHECK: pextrd
; RUN: grep pextrd %t | count 1 ; CHECK: movd
; bitcast a v4i16 to v2i32 ; bitcast a v4i16 to v2i32

11
test/CodeGen/X86/widen_cast-2.ll
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@ -1,6 +1,11 @@
; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t ; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s
; RUN: grep pextrd %t | count 5 ; CHECK: pextrd
; RUN: grep movd %t | count 3 ; CHECK: pextrd
; CHECK: movd
; CHECK: pextrd
; CHECK: pextrd
; CHECK: pextrd
; CHECK: movd
; bitcast v14i16 to v7i32 ; bitcast v14i16 to v7i32

7
test/CodeGen/X86/widen_cast-3.ll
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@ -1,6 +1,7 @@
; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t ; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s
; RUN: grep paddd %t | count 1 ; CHECK: paddd
; RUN: grep pextrd %t | count 2 ; CHECK: pextrd
; CHECK: pextrd
; bitcast v12i8 to v3i32 ; bitcast v12i8 to v3i32

11
test/CodeGen/X86/widen_cast-4.ll
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@ -1,5 +1,12 @@
; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t ; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s
; RUN: grep sarb %t | count 8 ; CHECK: sarb
; CHECK: sarb
; CHECK: sarb
; CHECK: sarb
; CHECK: sarb
; CHECK: sarb
; CHECK: sarb
; CHECK: sarb
; v8i8 that is widen to v16i8 then split ; v8i8 that is widen to v16i8 then split
; FIXME: This is widen to v16i8 and split to 16 and we then rebuild the vector. ; FIXME: This is widen to v16i8 and split to 16 and we then rebuild the vector.

4
test/CodeGen/X86/widen_cast-5.ll
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@ -1,4 +1,6 @@
; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t ; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s
; CHECK: movl
; CHECK: movd
; bitcast a i64 to v2i32 ; bitcast a i64 to v2i32

4
test/CodeGen/X86/widen_cast-6.ll
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@ -1,5 +1,5 @@
; RUN: llc < %s -march=x86 -mattr=+sse41 -disable-mmx -o %t ; RUN: llc < %s -march=x86 -mattr=+sse41 -disable-mmx | FileCheck %s
; RUN: grep movd %t | count 1 ; CHECK: movd
; Test bit convert that requires widening in the operand. ; Test bit convert that requires widening in the operand.

6
test/CodeGen/X86/widen_conv-1.ll
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@ -1,6 +1,6 @@
; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t ; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s
; RUN: grep pshufd %t | count 1 ; CHECK: pshufd
; RUN: grep paddd %t | count 1 ; CHECK: paddd
; truncate v2i64 to v2i32 ; truncate v2i64 to v2i32

4
test/CodeGen/X86/widen_conv-2.ll
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@ -1,4 +1,6 @@
; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t ; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s
; CHECK: movswl
; CHECK: movswl
; sign extension v2i32 to v2i16 ; sign extension v2i32 to v2i16

5
test/CodeGen/X86/widen_conv-3.ll
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@ -1,5 +1,6 @@
; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t ; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s
; grep cvtsi2ss %t | count 1 ; CHECK: cvtsi2ss
; sign to float v2i16 to v2f32 ; sign to float v2i16 to v2f32
define void @convert(<2 x float>* %dst.addr, <2 x i16> %src) nounwind { define void @convert(<2 x float>* %dst.addr, <2 x i16> %src) nounwind {

3
test/CodeGen/X86/widen_conv-4.ll
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@ -1,4 +1,5 @@
; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t ; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s
; CHECK: cvtsi2ss
; unsigned to float v7i16 to v7f32 ; unsigned to float v7i16 to v7f32

3
test/CodeGen/X86/widen_select-1.ll
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@ -1,4 +1,5 @@
; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t ; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s
; CHECK: jne
; widening select v6i32 and then a sub ; widening select v6i32 and then a sub

4
test/CodeGen/X86/widen_shuffle-1.ll
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@ -1,4 +1,6 @@
; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t ; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s
; CHECK: insertps
; CHECK: extractps
; widening shuffle v3float and then a add ; widening shuffle v3float and then a add

4
test/CodeGen/X86/widen_shuffle-2.ll
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@ -1,4 +1,6 @@
; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t ; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s
; CHECK: insertps
; CHECK: extractps
; widening shuffle v3float and then a add ; widening shuffle v3float and then a add