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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159300 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -187,7 +187,7 @@ struct X86Operand : public MCParsedAsmOperand {
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SMLoc getStartLoc() const { return StartLoc; }
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/// getEndLoc - Get the location of the last token of this operand.
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SMLoc getEndLoc() const { return EndLoc; }
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SMRange getLocRange() const { return SMRange(StartLoc, EndLoc); }
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virtual void print(raw_ostream &OS) const {}
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@ -309,25 +309,25 @@ struct X86Operand : public MCParsedAsmOperand {
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}
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bool isMem() const { return Kind == Memory; }
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bool isMem8() const {
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bool isMem8() const {
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return Kind == Memory && (!Mem.Size || Mem.Size == 8);
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}
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bool isMem16() const {
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bool isMem16() const {
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return Kind == Memory && (!Mem.Size || Mem.Size == 16);
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}
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bool isMem32() const {
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bool isMem32() const {
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return Kind == Memory && (!Mem.Size || Mem.Size == 32);
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}
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bool isMem64() const {
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bool isMem64() const {
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return Kind == Memory && (!Mem.Size || Mem.Size == 64);
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}
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bool isMem80() const {
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bool isMem80() const {
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return Kind == Memory && (!Mem.Size || Mem.Size == 80);
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}
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bool isMem128() const {
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bool isMem128() const {
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return Kind == Memory && (!Mem.Size || Mem.Size == 128);
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}
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bool isMem256() const {
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bool isMem256() const {
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return Kind == Memory && (!Mem.Size || Mem.Size == 256);
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}
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@ -356,26 +356,26 @@ struct X86Operand : public MCParsedAsmOperand {
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addExpr(Inst, getImm());
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}
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void addMem8Operands(MCInst &Inst, unsigned N) const {
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addMemOperands(Inst, N);
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void addMem8Operands(MCInst &Inst, unsigned N) const {
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addMemOperands(Inst, N);
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}
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void addMem16Operands(MCInst &Inst, unsigned N) const {
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addMemOperands(Inst, N);
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void addMem16Operands(MCInst &Inst, unsigned N) const {
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addMemOperands(Inst, N);
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}
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void addMem32Operands(MCInst &Inst, unsigned N) const {
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addMemOperands(Inst, N);
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void addMem32Operands(MCInst &Inst, unsigned N) const {
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addMemOperands(Inst, N);
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}
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void addMem64Operands(MCInst &Inst, unsigned N) const {
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addMemOperands(Inst, N);
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void addMem64Operands(MCInst &Inst, unsigned N) const {
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addMemOperands(Inst, N);
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}
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void addMem80Operands(MCInst &Inst, unsigned N) const {
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addMemOperands(Inst, N);
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void addMem80Operands(MCInst &Inst, unsigned N) const {
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addMemOperands(Inst, N);
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}
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void addMem128Operands(MCInst &Inst, unsigned N) const {
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addMemOperands(Inst, N);
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void addMem128Operands(MCInst &Inst, unsigned N) const {
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addMemOperands(Inst, N);
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}
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void addMem256Operands(MCInst &Inst, unsigned N) const {
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addMemOperands(Inst, N);
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void addMem256Operands(MCInst &Inst, unsigned N) const {
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addMemOperands(Inst, N);
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}
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void addMemOperands(MCInst &Inst, unsigned N) const {
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@ -467,7 +467,7 @@ bool X86AsmParser::isSrcOp(X86Operand &Op) {
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bool X86AsmParser::isDstOp(X86Operand &Op) {
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unsigned basereg = is64BitMode() ? X86::RDI : X86::EDI;
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return Op.isMem() &&
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return Op.isMem() &&
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(Op.Mem.SegReg == 0 || Op.Mem.SegReg == X86::ES) &&
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isa<MCConstantExpr>(Op.Mem.Disp) &&
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cast<MCConstantExpr>(Op.Mem.Disp)->getValue() == 0 &&
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@ -611,7 +611,7 @@ X86Operand *X86AsmParser::ParseIntelBracExpression(unsigned SegReg,
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if (getLexer().isNot(AsmToken::LBrac))
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return ErrorOperand(Start, "Expected '[' token!");
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Parser.Lex();
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if (getLexer().is(AsmToken::Identifier)) {
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// Parse BaseReg
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if (ParseRegister(BaseReg, Start, End)) {
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@ -668,7 +668,7 @@ X86Operand *X86AsmParser::ParseIntelBracExpression(unsigned SegReg,
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End = Parser.getTok().getLoc();
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if (!IndexReg)
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ParseRegister(IndexReg, Start, End);
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else if (getParser().ParseExpression(Disp, End)) return 0;
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else if (getParser().ParseExpression(Disp, End)) return 0;
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}
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}
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@ -947,7 +947,7 @@ ParseInstruction(StringRef Name, SMLoc NameLoc,
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if (PatchedName.startswith("set") && PatchedName.endswith("b") &&
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PatchedName != "setb" && PatchedName != "setnb")
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PatchedName = PatchedName.substr(0, Name.size()-1);
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// FIXME: Hack to recognize cmp<comparison code>{ss,sd,ps,pd}.
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const MCExpr *ExtraImmOp = 0;
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if ((PatchedName.startswith("cmp") || PatchedName.startswith("vcmp")) &&
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@ -1220,7 +1220,7 @@ ParseInstruction(StringRef Name, SMLoc NameLoc,
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}
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}
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}
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// Transforms "int $3" into "int3" as a size optimization. We can't write an
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// instalias with an immediate operand yet.
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if (Name == "int" && Operands.size() == 2) {
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@ -1523,7 +1523,7 @@ MatchAndEmitInstruction(SMLoc IDLoc,
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case Match_Success:
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// Some instructions need post-processing to, for example, tweak which
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// encoding is selected. Loop on it while changes happen so the
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// individual transformations can chain off each other.
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// individual transformations can chain off each other.
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while (processInstruction(Inst, Operands))
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;
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@ -1561,12 +1561,12 @@ MatchAndEmitInstruction(SMLoc IDLoc,
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// Otherwise, we assume that this may be an integer instruction, which comes
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// in 8/16/32/64-bit forms using the b,w,l,q suffixes respectively.
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const char *Suffixes = Base[0] != 'f' ? "bwlq" : "slt\0";
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// Check for the various suffix matches.
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Tmp[Base.size()] = Suffixes[0];
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unsigned ErrorInfoIgnore;
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unsigned Match1, Match2, Match3, Match4;
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Match1 = MatchInstructionImpl(Operands, Inst, ErrorInfoIgnore);
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Tmp[Base.size()] = Suffixes[1];
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Match2 = MatchInstructionImpl(Operands, Inst, ErrorInfoIgnore);
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@ -1694,19 +1694,19 @@ bool X86AsmParser::ParseDirectiveWord(unsigned Size, SMLoc L) {
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const MCExpr *Value;
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if (getParser().ParseExpression(Value))
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return true;
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getParser().getStreamer().EmitValue(Value, Size, 0 /*addrspace*/);
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if (getLexer().is(AsmToken::EndOfStatement))
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break;
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// FIXME: Improve diagnostic.
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if (getLexer().isNot(AsmToken::Comma))
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return Error(L, "unexpected token in directive");
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Parser.Lex();
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}
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}
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Parser.Lex();
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return false;
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}
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