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[PowerPC] Don't crash on PPC32 i64 fp_to_uint on modern cores
When we have an instruction for this (and, thus, don't generate a runtime call), we need to custom type legalize this (in a trivial way, just as we do for fp_to_sint). Fixes PR23173. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234561 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -7702,6 +7702,7 @@ void PPCTargetLowering::ReplaceNodeResults(SDNode *N,
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return;
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}
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case ISD::FP_TO_SINT:
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case ISD::FP_TO_UINT:
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// LowerFP_TO_INT() can only handle f32 and f64.
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if (N->getOperand(0).getValueType() == MVT::ppcf128)
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return;
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23
test/CodeGen/PowerPC/f32-to-i64.ll
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23
test/CodeGen/PowerPC/f32-to-i64.ll
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@ -0,0 +1,23 @@
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; RUN: llc < %s | FileCheck %s
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target datalayout = "E-m:e-p:32:32-i64:64-n32"
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target triple = "powerpc-unknown-unknown"
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; Function Attrs: nounwind
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define i64 @testullf(float %arg) #0 {
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entry:
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%arg.addr = alloca float, align 4
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store float %arg, float* %arg.addr, align 4
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%0 = load float, float* %arg.addr, align 4
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%conv = fptoui float %0 to i64
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ret i64 %conv
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; CHECK-LABEL: @testullf
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; CHECK: fctiduz [[REG1:[0-9]+]], 1
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; CHECK: stfd [[REG1]], [[OFF:[0-9]+]](1)
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; CHECK-DAG: lwz 3, [[OFF]](1)
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; CHECK-DAG: lwz 4, {{[0-9]+}}(1)
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; CHECK: blr
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}
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attributes #0 = { nounwind "target-cpu"="a2" }
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