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https://github.com/RPCSX/llvm.git
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keep track of what the current byte being emitted is
throughout the X86 encoder. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95771 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner
parent
8496a26113
commit
37ce80eca3
@ -56,20 +56,22 @@ public:
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return X86RegisterInfo::getX86RegNum(MO.getReg());
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}
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void EmitByte(unsigned char C, raw_ostream &OS) const {
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void EmitByte(unsigned char C, unsigned &CurByte, raw_ostream &OS) const {
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OS << (char)C;
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++CurByte;
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}
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void EmitConstant(uint64_t Val, unsigned Size, raw_ostream &OS) const {
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void EmitConstant(uint64_t Val, unsigned Size, unsigned &CurByte,
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raw_ostream &OS) const {
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// Output the constant in little endian byte order.
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for (unsigned i = 0; i != Size; ++i) {
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EmitByte(Val & 255, OS);
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EmitByte(Val & 255, CurByte, OS);
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Val >>= 8;
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}
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}
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void EmitDisplacementField(const MCOperand &Disp, int64_t Adj, bool IsPCRel,
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raw_ostream &OS) const;
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unsigned &CurByte, raw_ostream &OS) const;
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inline static unsigned char ModRMByte(unsigned Mod, unsigned RegOpcode,
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unsigned RM) {
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@ -78,20 +80,20 @@ public:
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}
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void EmitRegModRMByte(const MCOperand &ModRMReg, unsigned RegOpcodeFld,
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raw_ostream &OS) const {
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EmitByte(ModRMByte(3, RegOpcodeFld, GetX86RegNum(ModRMReg)), OS);
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unsigned &CurByte, raw_ostream &OS) const {
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EmitByte(ModRMByte(3, RegOpcodeFld, GetX86RegNum(ModRMReg)), CurByte, OS);
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}
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void EmitSIBByte(unsigned SS, unsigned Index, unsigned Base,
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raw_ostream &OS) const {
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// SIB byte is in the same format as the ModRMByte...
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EmitByte(ModRMByte(SS, Index, Base), OS);
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unsigned &CurByte, raw_ostream &OS) const {
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// SIB byte is in the same format as the ModRMByte.
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EmitByte(ModRMByte(SS, Index, Base), CurByte, OS);
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}
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void EmitMemModRMByte(const MCInst &MI, unsigned Op,
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unsigned RegOpcodeField, intptr_t PCAdj,
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raw_ostream &OS) const;
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unsigned &CurByte, raw_ostream &OS) const;
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void EncodeInstruction(const MCInst &MI, raw_ostream &OS,
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SmallVectorImpl<MCFixup> &Fixups) const;
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@ -120,13 +122,18 @@ static bool isDisp8(int Value) {
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void X86MCCodeEmitter::
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EmitDisplacementField(const MCOperand &DispOp, int64_t Adj, bool IsPCRel,
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raw_ostream &OS) const {
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unsigned &CurByte, raw_ostream &OS) const {
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// If this is a simple integer displacement that doesn't require a relocation,
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// emit it now.
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if (DispOp.isImm()) {
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EmitConstant(DispOp.getImm(), 4, OS);
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EmitConstant(DispOp.getImm(), 4, CurByte, OS);
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CurByte += 4;
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return;
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}
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// Emit a symbolic constant as 4 0's and a Fixup.
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EmitConstant(0, 4, CurByte, OS);
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CurByte += 4;
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assert(0 && "Reloc not handled yet");
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#if 0
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@ -159,7 +166,9 @@ EmitDisplacementField(const MCOperand &DispOp, int64_t Adj, bool IsPCRel,
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void X86MCCodeEmitter::EmitMemModRMByte(const MCInst &MI, unsigned Op,
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unsigned RegOpcodeField,
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intptr_t PCAdj, raw_ostream &OS) const {
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intptr_t PCAdj,
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unsigned &CurByte,
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raw_ostream &OS) const {
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const MCOperand &Disp = MI.getOperand(Op+3);
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const MCOperand &Base = MI.getOperand(Op);
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const MCOperand &Scale = MI.getOperand(Op+1);
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@ -183,8 +192,8 @@ void X86MCCodeEmitter::EmitMemModRMByte(const MCInst &MI, unsigned Op,
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if (BaseReg == 0 || // [disp32] in X86-32 mode
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BaseReg == X86::RIP) { // [disp32+RIP] in X86-64 mode
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EmitByte(ModRMByte(0, RegOpcodeField, 5), OS);
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EmitDisplacementField(Disp, PCAdj, true, OS);
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EmitByte(ModRMByte(0, RegOpcodeField, 5), CurByte, OS);
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EmitDisplacementField(Disp, PCAdj, true, CurByte, OS);
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return;
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}
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@ -195,20 +204,20 @@ void X86MCCodeEmitter::EmitMemModRMByte(const MCInst &MI, unsigned Op,
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// encoding for [EBP] with no displacement means [disp32] so we handle it
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// by emitting a displacement of 0 below.
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if (Disp.isImm() && Disp.getImm() == 0 && BaseRegNo != N86::EBP) {
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EmitByte(ModRMByte(0, RegOpcodeField, BaseRegNo), OS);
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EmitByte(ModRMByte(0, RegOpcodeField, BaseRegNo), CurByte, OS);
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return;
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}
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// Otherwise, if the displacement fits in a byte, encode as [REG+disp8].
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if (Disp.isImm() && isDisp8(Disp.getImm())) {
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EmitByte(ModRMByte(1, RegOpcodeField, BaseRegNo), OS);
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EmitConstant(Disp.getImm(), 1, OS);
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EmitByte(ModRMByte(1, RegOpcodeField, BaseRegNo), CurByte, OS);
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EmitConstant(Disp.getImm(), 1, CurByte, OS);
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return;
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}
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// Otherwise, emit the most general non-SIB encoding: [REG+disp32]
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EmitByte(ModRMByte(2, RegOpcodeField, BaseRegNo), OS);
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EmitDisplacementField(Disp, PCAdj, IsPCRel, OS);
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EmitByte(ModRMByte(2, RegOpcodeField, BaseRegNo), CurByte, OS);
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EmitDisplacementField(Disp, PCAdj, IsPCRel, CurByte, OS);
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return;
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}
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@ -221,22 +230,22 @@ void X86MCCodeEmitter::EmitMemModRMByte(const MCInst &MI, unsigned Op,
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if (BaseReg == 0) {
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// If there is no base register, we emit the special case SIB byte with
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// MOD=0, BASE=5, to JUST get the index, scale, and displacement.
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EmitByte(ModRMByte(0, RegOpcodeField, 4), OS);
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EmitByte(ModRMByte(0, RegOpcodeField, 4), CurByte, OS);
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ForceDisp32 = true;
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} else if (!Disp.isImm()) {
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// Emit the normal disp32 encoding.
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EmitByte(ModRMByte(2, RegOpcodeField, 4), OS);
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EmitByte(ModRMByte(2, RegOpcodeField, 4), CurByte, OS);
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ForceDisp32 = true;
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} else if (Disp.getImm() == 0 && BaseReg != X86::EBP) {
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// Emit no displacement ModR/M byte
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EmitByte(ModRMByte(0, RegOpcodeField, 4), OS);
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EmitByte(ModRMByte(0, RegOpcodeField, 4), CurByte, OS);
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} else if (isDisp8(Disp.getImm())) {
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// Emit the disp8 encoding.
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EmitByte(ModRMByte(1, RegOpcodeField, 4), OS);
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EmitByte(ModRMByte(1, RegOpcodeField, 4), CurByte, OS);
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ForceDisp8 = true; // Make sure to force 8 bit disp if Base=EBP
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} else {
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// Emit the normal disp32 encoding.
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EmitByte(ModRMByte(2, RegOpcodeField, 4), OS);
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EmitByte(ModRMByte(2, RegOpcodeField, 4), CurByte, OS);
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}
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// Calculate what the SS field value should be...
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@ -251,21 +260,21 @@ void X86MCCodeEmitter::EmitMemModRMByte(const MCInst &MI, unsigned Op,
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IndexRegNo = GetX86RegNum(IndexReg);
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else // Examples: [ESP+1*<noreg>+4] or [scaled idx]+disp32 (MOD=0,BASE=5)
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IndexRegNo = 4;
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EmitSIBByte(SS, IndexRegNo, 5, OS);
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EmitSIBByte(SS, IndexRegNo, 5, CurByte, OS);
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} else {
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unsigned IndexRegNo;
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if (IndexReg.getReg())
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IndexRegNo = GetX86RegNum(IndexReg);
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else
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IndexRegNo = 4; // For example [ESP+1*<noreg>+4]
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EmitSIBByte(SS, IndexRegNo, GetX86RegNum(Base), OS);
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EmitSIBByte(SS, IndexRegNo, GetX86RegNum(Base), CurByte, OS);
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}
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// Do we need to output a displacement?
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if (ForceDisp8)
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EmitConstant(Disp.getImm(), 1, OS);
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EmitConstant(Disp.getImm(), 1, CurByte, OS);
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else if (ForceDisp32 || Disp.getImm() != 0)
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EmitDisplacementField(Disp, PCAdj, IsPCRel, OS);
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EmitDisplacementField(Disp, PCAdj, IsPCRel, CurByte, OS);
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}
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/// DetermineREXPrefix - Determine if the MCInst has to be encoded with a X86-64
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@ -373,36 +382,39 @@ EncodeInstruction(const MCInst &MI, raw_ostream &OS,
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const TargetInstrDesc &Desc = TII.get(Opcode);
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unsigned TSFlags = Desc.TSFlags;
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// Keep track of the current byte being emitted.
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unsigned CurByte = 0;
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// FIXME: We should emit the prefixes in exactly the same order as GAS does,
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// in order to provide diffability.
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// Emit the lock opcode prefix as needed.
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if (TSFlags & X86II::LOCK)
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EmitByte(0xF0, OS);
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EmitByte(0xF0, CurByte, OS);
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// Emit segment override opcode prefix as needed.
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switch (TSFlags & X86II::SegOvrMask) {
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default: assert(0 && "Invalid segment!");
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case 0: break; // No segment override!
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case X86II::FS:
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EmitByte(0x64, OS);
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EmitByte(0x64, CurByte, OS);
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break;
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case X86II::GS:
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EmitByte(0x65, OS);
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EmitByte(0x65, CurByte, OS);
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break;
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}
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// Emit the repeat opcode prefix as needed.
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if ((TSFlags & X86II::Op0Mask) == X86II::REP)
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EmitByte(0xF3, OS);
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EmitByte(0xF3, CurByte, OS);
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// Emit the operand size opcode prefix as needed.
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if (TSFlags & X86II::OpSize)
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EmitByte(0x66, OS);
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EmitByte(0x66, CurByte, OS);
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// Emit the address size opcode prefix as needed.
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if (TSFlags & X86II::AdSize)
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EmitByte(0x67, OS);
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EmitByte(0x67, CurByte, OS);
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bool Need0FPrefix = false;
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switch (TSFlags & X86II::Op0Mask) {
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@ -415,46 +427,46 @@ EncodeInstruction(const MCInst &MI, raw_ostream &OS,
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Need0FPrefix = true;
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break;
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case X86II::TF: // F2 0F 38
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EmitByte(0xF2, OS);
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EmitByte(0xF2, CurByte, OS);
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Need0FPrefix = true;
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break;
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case X86II::XS: // F3 0F
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EmitByte(0xF3, OS);
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EmitByte(0xF3, CurByte, OS);
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Need0FPrefix = true;
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break;
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case X86II::XD: // F2 0F
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EmitByte(0xF2, OS);
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EmitByte(0xF2, CurByte, OS);
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Need0FPrefix = true;
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break;
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case X86II::D8: EmitByte(0xD8, OS); break;
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case X86II::D9: EmitByte(0xD9, OS); break;
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case X86II::DA: EmitByte(0xDA, OS); break;
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case X86II::DB: EmitByte(0xDB, OS); break;
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case X86II::DC: EmitByte(0xDC, OS); break;
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case X86II::DD: EmitByte(0xDD, OS); break;
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case X86II::DE: EmitByte(0xDE, OS); break;
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case X86II::DF: EmitByte(0xDF, OS); break;
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case X86II::D8: EmitByte(0xD8, CurByte, OS); break;
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case X86II::D9: EmitByte(0xD9, CurByte, OS); break;
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case X86II::DA: EmitByte(0xDA, CurByte, OS); break;
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case X86II::DB: EmitByte(0xDB, CurByte, OS); break;
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case X86II::DC: EmitByte(0xDC, CurByte, OS); break;
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case X86II::DD: EmitByte(0xDD, CurByte, OS); break;
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case X86II::DE: EmitByte(0xDE, CurByte, OS); break;
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case X86II::DF: EmitByte(0xDF, CurByte, OS); break;
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}
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// Handle REX prefix.
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// FIXME: Can this come before F2 etc to simplify emission?
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if (Is64BitMode) {
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if (unsigned REX = DetermineREXPrefix(MI, TSFlags, Desc))
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EmitByte(0x40 | REX, OS);
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EmitByte(0x40 | REX, CurByte, OS);
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}
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// 0x0F escape code must be emitted just before the opcode.
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if (Need0FPrefix)
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EmitByte(0x0F, OS);
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EmitByte(0x0F, CurByte, OS);
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// FIXME: Pull this up into previous switch if REX can be moved earlier.
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switch (TSFlags & X86II::Op0Mask) {
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case X86II::TF: // F2 0F 38
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case X86II::T8: // 0F 38
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EmitByte(0x38, OS);
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EmitByte(0x38, CurByte, OS);
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break;
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case X86II::TA: // 0F 3A
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EmitByte(0x3A, OS);
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EmitByte(0x3A, CurByte, OS);
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break;
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}
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@ -474,7 +486,7 @@ EncodeInstruction(const MCInst &MI, raw_ostream &OS,
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default: errs() << "FORM: " << (TSFlags & X86II::FormMask) << "\n";
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assert(0 && "Unknown FormMask value in X86MCCodeEmitter!");
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case X86II::RawFrm: {
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EmitByte(BaseOpcode, OS);
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EmitByte(BaseOpcode, CurByte, OS);
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if (CurOp == NumOps)
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break;
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@ -484,14 +496,14 @@ EncodeInstruction(const MCInst &MI, raw_ostream &OS,
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}
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case X86II::AddRegFrm: {
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EmitByte(BaseOpcode + GetX86RegNum(MI.getOperand(CurOp++)),OS);
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EmitByte(BaseOpcode + GetX86RegNum(MI.getOperand(CurOp++)), CurByte, OS);
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if (CurOp == NumOps)
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break;
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const MCOperand &MO1 = MI.getOperand(CurOp++);
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if (MO1.isImm()) {
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unsigned Size = X86II::getSizeOfImm(TSFlags);
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EmitConstant(MO1.getImm(), Size, OS);
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EmitConstant(MO1.getImm(), Size, CurByte, OS);
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break;
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}
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@ -500,38 +512,38 @@ EncodeInstruction(const MCInst &MI, raw_ostream &OS,
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}
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case X86II::MRMDestReg:
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EmitByte(BaseOpcode, OS);
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EmitByte(BaseOpcode, CurByte, OS);
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EmitRegModRMByte(MI.getOperand(CurOp),
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GetX86RegNum(MI.getOperand(CurOp+1)), OS);
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GetX86RegNum(MI.getOperand(CurOp+1)), CurByte, OS);
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CurOp += 2;
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if (CurOp != NumOps)
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EmitConstant(MI.getOperand(CurOp++).getImm(),
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X86II::getSizeOfImm(TSFlags), OS);
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X86II::getSizeOfImm(TSFlags), CurByte, OS);
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break;
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case X86II::MRMDestMem:
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EmitByte(BaseOpcode, OS);
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EmitByte(BaseOpcode, CurByte, OS);
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EmitMemModRMByte(MI, CurOp,
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GetX86RegNum(MI.getOperand(CurOp + X86AddrNumOperands)),
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0, OS);
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0, CurByte, OS);
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CurOp += X86AddrNumOperands + 1;
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if (CurOp != NumOps)
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EmitConstant(MI.getOperand(CurOp++).getImm(),
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X86II::getSizeOfImm(TSFlags), OS);
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X86II::getSizeOfImm(TSFlags), CurByte, OS);
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break;
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case X86II::MRMSrcReg:
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EmitByte(BaseOpcode, OS);
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EmitByte(BaseOpcode, CurByte, OS);
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EmitRegModRMByte(MI.getOperand(CurOp+1), GetX86RegNum(MI.getOperand(CurOp)),
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OS);
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CurByte, OS);
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CurOp += 2;
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if (CurOp != NumOps)
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EmitConstant(MI.getOperand(CurOp++).getImm(),
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X86II::getSizeOfImm(TSFlags), OS);
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X86II::getSizeOfImm(TSFlags), CurByte, OS);
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break;
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case X86II::MRMSrcMem: {
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EmitByte(BaseOpcode, OS);
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EmitByte(BaseOpcode, CurByte, OS);
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// FIXME: Maybe lea should have its own form? This is a horrible hack.
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int AddrOperands;
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@ -546,11 +558,11 @@ EncodeInstruction(const MCInst &MI, raw_ostream &OS,
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X86II::getSizeOfImm(TSFlags) : 0;
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EmitMemModRMByte(MI, CurOp+1, GetX86RegNum(MI.getOperand(CurOp)),
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PCAdj, OS);
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PCAdj, CurByte, OS);
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CurOp += AddrOperands + 1;
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if (CurOp != NumOps)
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EmitConstant(MI.getOperand(CurOp++).getImm(),
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X86II::getSizeOfImm(TSFlags), OS);
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X86II::getSizeOfImm(TSFlags), CurByte, OS);
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break;
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}
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@ -558,23 +570,24 @@ EncodeInstruction(const MCInst &MI, raw_ostream &OS,
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case X86II::MRM2r: case X86II::MRM3r:
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case X86II::MRM4r: case X86II::MRM5r:
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case X86II::MRM6r: case X86II::MRM7r: {
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EmitByte(BaseOpcode, OS);
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EmitByte(BaseOpcode, CurByte, OS);
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// Special handling of lfence, mfence, monitor, and mwait.
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// FIXME: This is terrible, they should get proper encoding bits in TSFlags.
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if (Opcode == X86::LFENCE || Opcode == X86::MFENCE ||
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Opcode == X86::MONITOR || Opcode == X86::MWAIT) {
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EmitByte(ModRMByte(3, (TSFlags & X86II::FormMask)-X86II::MRM0r, 0), OS);
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EmitByte(ModRMByte(3, (TSFlags & X86II::FormMask)-X86II::MRM0r, 0),
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CurByte, OS);
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switch (Opcode) {
|
||||
default: break;
|
||||
case X86::MONITOR: EmitByte(0xC8, OS); break;
|
||||
case X86::MWAIT: EmitByte(0xC9, OS); break;
|
||||
case X86::MONITOR: EmitByte(0xC8, CurByte, OS); break;
|
||||
case X86::MWAIT: EmitByte(0xC9, CurByte, OS); break;
|
||||
}
|
||||
} else {
|
||||
EmitRegModRMByte(MI.getOperand(CurOp++),
|
||||
(TSFlags & X86II::FormMask)-X86II::MRM0r,
|
||||
OS);
|
||||
CurByte, OS);
|
||||
}
|
||||
|
||||
if (CurOp == NumOps)
|
||||
@ -582,7 +595,7 @@ EncodeInstruction(const MCInst &MI, raw_ostream &OS,
|
||||
|
||||
const MCOperand &MO1 = MI.getOperand(CurOp++);
|
||||
if (MO1.isImm()) {
|
||||
EmitConstant(MO1.getImm(), X86II::getSizeOfImm(TSFlags), OS);
|
||||
EmitConstant(MO1.getImm(), X86II::getSizeOfImm(TSFlags), CurByte, OS);
|
||||
break;
|
||||
}
|
||||
|
||||
@ -617,9 +630,9 @@ EncodeInstruction(const MCInst &MI, raw_ostream &OS,
|
||||
PCAdj = 4;
|
||||
}
|
||||
|
||||
EmitByte(BaseOpcode, OS);
|
||||
EmitByte(BaseOpcode, CurByte, OS);
|
||||
EmitMemModRMByte(MI, CurOp, (TSFlags & X86II::FormMask)-X86II::MRM0m,
|
||||
PCAdj, OS);
|
||||
PCAdj, CurByte, OS);
|
||||
CurOp += X86AddrNumOperands;
|
||||
|
||||
if (CurOp == NumOps)
|
||||
@ -627,7 +640,7 @@ EncodeInstruction(const MCInst &MI, raw_ostream &OS,
|
||||
|
||||
const MCOperand &MO = MI.getOperand(CurOp++);
|
||||
if (MO.isImm()) {
|
||||
EmitConstant(MO.getImm(), X86II::getSizeOfImm(TSFlags), OS);
|
||||
EmitConstant(MO.getImm(), X86II::getSizeOfImm(TSFlags), CurByte, OS);
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user