RPCSX/llvm
1
0
Fork 0
mirror of https://github.com/RPCSX/llvm.git synced 2024-11-30 23:20:54 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

[APInt] Remove shift functions from APIntOps namespace. Replace the few users with the APInt class methods. NFCI

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299248 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper 2017-03-31 20:01:16 +00:00
parent 3e86a05613
commit 38017a1fee
3 changed files with 9 additions and 30 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

21
include/llvm/ADT/APInt.h
View File

@ -1984,27 +1984,6 @@ inline APInt RoundFloatToAPInt(float Float, unsigned width) {
return RoundDoubleToAPInt(double(Float), width);
}
/// \brief Arithmetic right-shift function.
///
/// Arithmetic right-shift the APInt by shiftAmt.
inline APInt ashr(const APInt &LHS, unsigned shiftAmt) {
return LHS.ashr(shiftAmt);
}
/// \brief Logical right-shift function.
///
/// Logical right-shift the APInt by shiftAmt.
inline APInt lshr(const APInt &LHS, unsigned shiftAmt) {
return LHS.lshr(shiftAmt);
}
/// \brief Left-shift function.
///
/// Left-shift the APInt by shiftAmt.
inline APInt shl(const APInt &LHS, unsigned shiftAmt) {
return LHS.shl(shiftAmt);
}
/// \brief Signed division function for APInt.
///
/// Signed divide APInt LHS by APInt RHS.

8
lib/Analysis/ValueTracking.cpp
View File

@ -1120,13 +1120,13 @@ static void computeKnownBitsFromOperator(const Operator *I, APInt &KnownZero,
case Instruction::LShr: {
// (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
auto KZF = [BitWidth](const APInt &KnownZero, unsigned ShiftAmt) {
return APIntOps::lshr(KnownZero, ShiftAmt) |
return KnownZero.lshr(ShiftAmt) |
// High bits known zero.
APInt::getHighBitsSet(BitWidth, ShiftAmt);
};
auto KOF = [](const APInt &KnownOne, unsigned ShiftAmt) {
return APIntOps::lshr(KnownOne, ShiftAmt);
return KnownOne.lshr(ShiftAmt);
};
computeKnownBitsFromShiftOperator(I, KnownZero, KnownOne,
@ -1137,11 +1137,11 @@ static void computeKnownBitsFromOperator(const Operator *I, APInt &KnownZero,
case Instruction::AShr: {
// (ashr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
auto KZF = [](const APInt &KnownZero, unsigned ShiftAmt) {
return APIntOps::ashr(KnownZero, ShiftAmt);
return KnownZero.ashr(ShiftAmt);
};
auto KOF = [](const APInt &KnownOne, unsigned ShiftAmt) {
return APIntOps::ashr(KnownOne, ShiftAmt);
return KnownOne.ashr(ShiftAmt);
};
computeKnownBitsFromShiftOperator(I, KnownZero, KnownOne,

10
lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
View File

@ -606,8 +606,8 @@ Value *InstCombiner::SimplifyDemandedUseBits(Value *V, APInt DemandedMask,
Depth + 1))
return I;
assert(!(KnownZero & KnownOne) && "Bits known to be one AND zero?");
KnownZero = APIntOps::lshr(KnownZero, ShiftAmt);
KnownOne = APIntOps::lshr(KnownOne, ShiftAmt);
KnownZero = KnownZero.lshr(ShiftAmt);
KnownOne = KnownOne.lshr(ShiftAmt);
if (ShiftAmt)
KnownZero.setHighBits(ShiftAmt); // high bits known zero.
}
@ -650,13 +650,13 @@ Value *InstCombiner::SimplifyDemandedUseBits(Value *V, APInt DemandedMask,
assert(!(KnownZero & KnownOne) && "Bits known to be one AND zero?");
// Compute the new bits that are at the top now.
APInt HighBits(APInt::getHighBitsSet(BitWidth, ShiftAmt));
KnownZero = APIntOps::lshr(KnownZero, ShiftAmt);
KnownOne = APIntOps::lshr(KnownOne, ShiftAmt);
KnownZero = KnownZero.lshr(ShiftAmt);
KnownOne = KnownOne.lshr(ShiftAmt);
// Handle the sign bits.
APInt SignBit(APInt::getSignBit(BitWidth));
// Adjust to where it is now in the mask.
SignBit = APIntOps::lshr(SignBit, ShiftAmt);
SignBit = SignBit.lshr(ShiftAmt);
// If the input sign bit is known to be zero, or if none of the top bits
// are demanded, turn this into an unsigned shift right.