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Consider 64-bit registers to be FP as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18432 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -815,7 +815,9 @@ void X86ISel::InsertFPRegKills() {
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MachineBasicBlock *SBB = *SI;
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for (MachineBasicBlock::iterator I = SBB->begin();
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I != SBB->end() && I->getOpcode() == X86::PHI; ++I) {
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if (RegMap.getRegClass(I->getOperand(0).getReg())->getSize() == 10)
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const TargetRegisterClass *RC =
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RegMap.getRegClass(I->getOperand(0).getReg());
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if (RC->getSize() == 10 || RC->getSize() == 8)
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goto UsesFPReg;
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}
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}
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