Consider 64-bit registers to be FP as well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18432 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2004-12-02 17:57:21 +00:00
parent 0da7f49381
commit 3986924e0b

View File

@ -815,7 +815,9 @@ void X86ISel::InsertFPRegKills() {
MachineBasicBlock *SBB = *SI;
for (MachineBasicBlock::iterator I = SBB->begin();
I != SBB->end() && I->getOpcode() == X86::PHI; ++I) {
if (RegMap.getRegClass(I->getOperand(0).getReg())->getSize() == 10)
const TargetRegisterClass *RC =
RegMap.getRegClass(I->getOperand(0).getReg());
if (RC->getSize() == 10 || RC->getSize() == 8)
goto UsesFPReg;
}
}