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[AArch64][FastISel] Add more truncation tests.

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This is a follow-up to r243198 and adds more truncation tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243304 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Juergen Ributzka 2015-07-27 19:00:23 +00:00
parent 8e2e335276
commit 39fccc4135
1 changed files with 44 additions and 16 deletions
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60
test/CodeGen/AArch64/arm64-fast-isel-conversion.ll
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@ -363,7 +363,8 @@ entry:
define i32 @i64_trunc_i32(i64 %a) nounwind ssp {
entry:
; CHECK-LABEL: i64_trunc_i32
; CHECK: mov x1, x0
; CHECK: mov [[REG:x[0-9]+]], x0
; CHECK-NEXT: mov x0, [[REG]]
%conv = trunc i64 %a to i32
ret i32 %conv
}
@ -371,9 +372,9 @@ entry:
define zeroext i16 @i64_trunc_i16(i64 %a) nounwind ssp {
entry:
; CHECK-LABEL: i64_trunc_i16
; CHECK: mov x[[REG:[0-9]+]], x0
; CHECK: and [[REG2:w[0-9]+]], w[[REG]], #0xffff
; CHECK: uxth w0, [[REG2]]
; CHECK: mov x[[REG:[0-9]+]], x0
; CHECK-NEXT: and [[REG2:w[0-9]+]], w[[REG]], #0xffff
; CHECK-NEXT: uxth w0, [[REG2]]
%conv = trunc i64 %a to i16
ret i16 %conv
}
@ -381,9 +382,9 @@ entry:
define zeroext i8 @i64_trunc_i8(i64 %a) nounwind ssp {
entry:
; CHECK-LABEL: i64_trunc_i8
; CHECK: mov x[[REG:[0-9]+]], x0
; CHECK: and [[REG2:w[0-9]+]], w[[REG]], #0xff
; CHECK: uxtb w0, [[REG2]]
; CHECK: mov x[[REG:[0-9]+]], x0
; CHECK-NEXT: and [[REG2:w[0-9]+]], w[[REG]], #0xff
; CHECK-NEXT: uxtb w0, [[REG2]]
%conv = trunc i64 %a to i8
ret i8 %conv
}
@ -391,9 +392,9 @@ entry:
define zeroext i1 @i64_trunc_i1(i64 %a) nounwind ssp {
entry:
; CHECK-LABEL: i64_trunc_i1
; CHECK: mov x[[REG:[0-9]+]], x0
; CHECK: and [[REG2:w[0-9]+]], w[[REG]], #0x1
; CHECK: and w0, [[REG2]], #0x1
; CHECK: mov x[[REG:[0-9]+]], x0
; CHECK-NEXT: and [[REG2:w[0-9]+]], w[[REG]], #0x1
; CHECK-NEXT: and w0, [[REG2]], #0x1
%conv = trunc i64 %a to i1
ret i1 %conv
}
@ -401,8 +402,8 @@ entry:
define zeroext i16 @i32_trunc_i16(i32 %a) nounwind ssp {
entry:
; CHECK-LABEL: i32_trunc_i16
; CHECK: and [[REG:w[0-9]+]], w0, #0xffff
; CHECK: uxth w0, [[REG]]
; CHECK: and [[REG:w[0-9]+]], w0, #0xffff
; CHECK-NEXT: uxth w0, [[REG]]
%conv = trunc i32 %a to i16
ret i16 %conv
}
@ -410,8 +411,8 @@ entry:
define zeroext i8 @i32_trunc_i8(i32 %a) nounwind ssp {
entry:
; CHECK-LABEL: i32_trunc_i8
; CHECK: and [[REG:w[0-9]+]], w0, #0xff
; CHECK: uxtb w0, [[REG]]
; CHECK: and [[REG:w[0-9]+]], w0, #0xff
; CHECK-NEXT: uxtb w0, [[REG]]
%conv = trunc i32 %a to i8
ret i8 %conv
}
@ -419,12 +420,39 @@ entry:
define zeroext i1 @i32_trunc_i1(i32 %a) nounwind ssp {
entry:
; CHECK-LABEL: i32_trunc_i1
; CHECK: and [[REG:w[0-9]+]], w0, #0x1
; CHECK: and w0, [[REG]], #0x1
; CHECK: and [[REG:w[0-9]+]], w0, #0x1
; CHECK-NEXT: and w0, [[REG]], #0x1
%conv = trunc i32 %a to i1
ret i1 %conv
}
define zeroext i8 @i16_trunc_i8(i16 zeroext %a) nounwind ssp {
entry:
; CHECK-LABEL: i16_trunc_i8
; CHECK: and [[REG:w[0-9]+]], w0, #0xff
; CHECK-NEXT: uxtb w0, [[REG]]
%conv = trunc i16 %a to i8
ret i8 %conv
}
define zeroext i1 @i16_trunc_i1(i16 zeroext %a) nounwind ssp {
entry:
; CHECK-LABEL: i16_trunc_i1
; CHECK: and [[REG:w[0-9]+]], w0, #0x1
; CHECK-NEXT: and w0, [[REG]], #0x1
%conv = trunc i16 %a to i1
ret i1 %conv
}
define zeroext i1 @i8_trunc_i1(i8 zeroext %a) nounwind ssp {
entry:
; CHECK-LABEL: i8_trunc_i1
; CHECK: and [[REG:w[0-9]+]], w0, #0x1
; CHECK-NEXT: and w0, [[REG]], #0x1
%conv = trunc i8 %a to i1
ret i1 %conv
}
; rdar://15101939
define void @stack_trunc() nounwind {
; CHECK-LABEL: stack_trunc