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Fix for PR23103. Correctly propagate the 'IsUndef' flag to the register operands of a commuted instruction.

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Revision 220239 exposed a latent bug in method
'TargetInstrInfo::commuteInstruction'. When commuting the operands of a machine
instruction, method 'commuteInstruction' didn't correctly propagate the
'IsUndef' flag to the register operands of the new (commuted) instruction.

Before this patch, the following instruction:
  %vreg4<def> = VADDSDrr  %vreg14, %vreg5<undef>; FR64:%vreg4,%vreg14,%vreg5

was wrongly converted by method 'commuteInstruction' into:
  %vreg4<def> = VADDSDrr  %vreg5, %vreg14<undef>; FR64:%vreg4,%vreg5,%vreg14

The correct instruction should have been:
  %vreg4<def> = VADDSDrr  %vreg5<undef>, %vreg14; FR64:%vreg4,%vreg5,%vreg14

This patch fixes the problem in method 'TargetInstrInfo::commuteInstruction'.
When swapping the operands of a machine instruction, we now make sure that
'IsUndef' flags are correctly set.
Added test case 'pr23103.ll'.

Differential Revision: http://reviews.llvm.org/D9406


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236258 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Andrea Di Biagio 2015-04-30 21:03:29 +00:00
parent 494f112fbc
commit 3b15669938
2 changed files with 25 additions and 0 deletions
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4
lib/CodeGen/TargetInstrInfo.cpp
View File

@ -142,6 +142,8 @@ MachineInstr *TargetInstrInfo::commuteInstruction(MachineInstr *MI,
unsigned SubReg2 = MI->getOperand(Idx2).getSubReg();
bool Reg1IsKill = MI->getOperand(Idx1).isKill();
bool Reg2IsKill = MI->getOperand(Idx2).isKill();
bool Reg1IsUndef = MI->getOperand(Idx1).isUndef();
bool Reg2IsUndef = MI->getOperand(Idx2).isUndef();
// If destination is tied to either of the commuted source register, then
// it must be updated.
if (HasDef && Reg0 == Reg1 &&
@ -172,6 +174,8 @@ MachineInstr *TargetInstrInfo::commuteInstruction(MachineInstr *MI,
MI->getOperand(Idx1).setSubReg(SubReg2);
MI->getOperand(Idx2).setIsKill(Reg1IsKill);
MI->getOperand(Idx1).setIsKill(Reg2IsKill);
MI->getOperand(Idx2).setIsUndef(Reg1IsUndef);
MI->getOperand(Idx1).setIsUndef(Reg2IsUndef);
return MI;
}

21
test/CodeGen/X86/pr23103.ll Normal file
View File

@ -0,0 +1,21 @@
; RUN: llc -verify-machineinstrs -mtriple=x86_64-unknown-unknown -mcpu=generic -mattr=+avx < %s | FileCheck %s
; When commuting a VADDSDrr instruction, verify that the 'IsUndef' flag is
; correctly propagated to the operands of the resulting instruction.
; Test for PR23103;
declare zeroext i1 @foo(<1 x double>)
define <1 x double> @pr23103(<1 x double>* align 8 %Vp) {
; CHECK-LABEL: pr23103:
; CHECK: vmovsd (%rdi), %xmm0
; CHECK-NEXT: vmovsd %xmm0, {{.*}}(%rsp) {{.*#+}} 8-byte Spill
; CHECK-NEXT: callq foo
; CHECK-NEXT: vaddsd {{.*}}(%rsp), %xmm0, %xmm0 {{.*#+}} 8-byte Folded Reload
; CHECK: retq
entry:
%V = load <1 x double>, <1 x double>* %Vp, align 8
%call = call zeroext i1 @foo(<1 x double> %V)
%fadd = fadd <1 x double> %V, undef
ret <1 x double> %fadd
}