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Silencing a "result of 32-bit shift implicitly converted to 64 bits (was 64-bit shift intended?)" warning in MSVC; NFC.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230489 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Aaron Ballman 2015-02-25 13:05:24 +00:00
parent d7b05fe20f
commit 3cecbeccf2
1 changed files with 1 additions and 1 deletions
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2
lib/Target/PowerPC/PPCISelLowering.cpp
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@ -9987,7 +9987,7 @@ SDValue PPCTargetLowering::PerformDAGCombine(SDNode *N,
isa<ConstantSDNode>(UI->getOperand(1)) && isa<ConstantSDNode>(UI->getOperand(1)) &&
(cast<ConstantSDNode>(Add->getOperand(1))->getZExtValue() - (cast<ConstantSDNode>(Add->getOperand(1))->getZExtValue() -
cast<ConstantSDNode>(UI->getOperand(1))->getZExtValue()) % cast<ConstantSDNode>(UI->getOperand(1))->getZExtValue()) %
(1 << Bits) == 0) { (1ULL << Bits) == 0) {
SDNode *OtherAdd = *UI; SDNode *OtherAdd = *UI;
for (SDNode::use_iterator VI = OtherAdd->use_begin(), for (SDNode::use_iterator VI = OtherAdd->use_begin(),
VE = OtherAdd->use_end(); VI != VE; ++VI) { VE = OtherAdd->use_end(); VI != VE; ++VI) {