Soft float support for FREM.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68614 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Duncan Sands 2009-04-08 16:20:57 +00:00
parent e3bc46ede5
commit 3d0355b825
3 changed files with 23 additions and 0 deletions

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@ -80,6 +80,7 @@ void DAGTypeLegalizer::SoftenFloatResult(SDNode *N, unsigned ResNo) {
case ISD::FP_ROUND: R = SoftenFloatRes_FP_ROUND(N); break;
case ISD::FPOW: R = SoftenFloatRes_FPOW(N); break;
case ISD::FPOWI: R = SoftenFloatRes_FPOWI(N); break;
case ISD::FREM: R = SoftenFloatRes_FREM(N); break;
case ISD::FRINT: R = SoftenFloatRes_FRINT(N); break;
case ISD::FSIN: R = SoftenFloatRes_FSIN(N); break;
case ISD::FSQRT: R = SoftenFloatRes_FSQRT(N); break;
@ -363,6 +364,18 @@ SDValue DAGTypeLegalizer::SoftenFloatRes_FPOWI(SDNode *N) {
NVT, Ops, 2, false, N->getDebugLoc());
}
SDValue DAGTypeLegalizer::SoftenFloatRes_FREM(SDNode *N) {
MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
GetSoftenedFloat(N->getOperand(1)) };
return MakeLibCall(GetFPLibCall(N->getValueType(0),
RTLIB::REM_F32,
RTLIB::REM_F64,
RTLIB::REM_F80,
RTLIB::REM_PPCF128),
NVT, Ops, 2, false, N->getDebugLoc());
}
SDValue DAGTypeLegalizer::SoftenFloatRes_FRINT(SDNode *N) {
MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
SDValue Op = GetSoftenedFloat(N->getOperand(0));

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@ -414,6 +414,7 @@ private:
SDValue SoftenFloatRes_FP_ROUND(SDNode *N);
SDValue SoftenFloatRes_FPOW(SDNode *N);
SDValue SoftenFloatRes_FPOWI(SDNode *N);
SDValue SoftenFloatRes_FREM(SDNode *N);
SDValue SoftenFloatRes_FRINT(SDNode *N);
SDValue SoftenFloatRes_FSIN(SDNode *N);
SDValue SoftenFloatRes_FSQRT(SDNode *N);

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@ -0,0 +1,9 @@
; RUN: llvm-as < %s | llc -march=arm
declare i32 @printf(i8*, ...)
define i32 @main() {
%rem_r = frem double 0.000000e+00, 0.000000e+00 ; <double> [#uses=1]
%1 = call i32 (i8*, ...)* @printf(i8* null, double %rem_r) ; <i32> [#uses=0]
ret i32 0
}