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Fix PR23065. Avoid optimizing bitcast of build_vector with constant input to scalar_to_vector.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233778 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jiangning Liu 2015-04-01 01:52:38 +00:00
parent 252c120f4a
commit 3ee56c2c67
2 changed files with 27 additions and 5 deletions
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5
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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@ -7024,7 +7024,6 @@ ConstantFoldBITCASTofBUILD_VECTOR(SDNode *BV, EVT DstEltVT) {
// Finally, this must be the case where we are shrinking elements: each input
// turns into multiple outputs.
bool isS2V = ISD::isScalarToVector(BV);
unsigned NumOutputsPerInput = SrcBitSize/DstBitSize;
EVT VT = EVT::getVectorVT(*DAG.getContext(), DstEltVT,
NumOutputsPerInput*BV->getNumOperands());
@ -7042,10 +7041,6 @@ ConstantFoldBITCASTofBUILD_VECTOR(SDNode *BV, EVT DstEltVT) {
for (unsigned j = 0; j != NumOutputsPerInput; ++j) {
APInt ThisVal = OpVal.trunc(DstBitSize);
Ops.push_back(DAG.getConstant(ThisVal, DstEltVT));
if (isS2V && i == 0 && j == 0 && ThisVal.zext(SrcBitSize) == OpVal)
// Simply turn this into a SCALAR_TO_VECTOR of the new type.
return DAG.getNode(ISD::SCALAR_TO_VECTOR, SDLoc(BV), VT,
Ops[0]);
OpVal = OpVal.lshr(DstBitSize);
}

27
test/CodeGen/AArch64/bitcast.ll Normal file
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@ -0,0 +1,27 @@
; RUN: llc < %s -mtriple=aarch64--linux-gnu | FileCheck %s
; PR23065: SCALAR_TO_VECTOR implies the top elements 1 to N-1 of the N-element vector are undefined.
define <4 x i16> @foo1(<2 x i32> %a) {
; CHECK-LABEL: foo1:
; CHECK: movi d0, #0000000000000000
; CHECK-NEXT: ret
%1 = shufflevector <2 x i32> <i32 58712, i32 undef>, <2 x i32> %a, <2 x i32> <i32 0, i32 2>
; Can't optimize the following bitcast to scalar_to_vector.
%2 = bitcast <2 x i32> %1 to <4 x i16>
%3 = shufflevector <4 x i16> %2, <4 x i16> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
ret <4 x i16> %3
}
define <4 x i16> @foo2(<2 x i32> %a) {
; CHECK-LABEL: foo2:
; CHECK: movi d0, #0000000000000000
; CHECK-NEXT: ret
%1 = shufflevector <2 x i32> <i32 712, i32 undef>, <2 x i32> %a, <2 x i32> <i32 0, i32 2>
; Can't optimize the following bitcast to scalar_to_vector.
%2 = bitcast <2 x i32> %1 to <4 x i16>
%3 = shufflevector <4 x i16> %2, <4 x i16> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
ret <4 x i16> %3
}