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R600/SI: Don't emit S_WQM_B64 instruction for compute shaders

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190077 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tom Stellard 2013-09-05 18:37:52 +00:00
parent 791cdd5fe0
commit 402b8e2175
3 changed files with 16 additions and 1 deletions
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3
lib/Target/R600/SILowerControlFlow.cpp
View File

@ -409,6 +409,7 @@ void SILowerControlFlowPass::IndirectDst(MachineInstr &MI) {
bool SILowerControlFlowPass::runOnMachineFunction(MachineFunction &MF) { bool SILowerControlFlowPass::runOnMachineFunction(MachineFunction &MF) {
TII = MF.getTarget().getInstrInfo(); TII = MF.getTarget().getInstrInfo();
TRI = MF.getTarget().getRegisterInfo(); TRI = MF.getTarget().getRegisterInfo();
SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>();
bool HaveKill = false; bool HaveKill = false;
bool NeedM0 = false; bool NeedM0 = false;
@ -508,7 +509,7 @@ bool SILowerControlFlowPass::runOnMachineFunction(MachineFunction &MF) {
AMDGPU::M0).addImm(0xffffffff); AMDGPU::M0).addImm(0xffffffff);
} }
if (NeedWQM) { if (NeedWQM && MFI->ShaderType != ShaderType::COMPUTE) {
MachineBasicBlock &MBB = MF.front(); MachineBasicBlock &MBB = MF.front();
BuildMI(MBB, MBB.getFirstNonPHI(), DebugLoc(), TII->get(AMDGPU::S_WQM_B64), BuildMI(MBB, MBB.getFirstNonPHI(), DebugLoc(), TII->get(AMDGPU::S_WQM_B64),
AMDGPU::EXEC).addReg(AMDGPU::EXEC); AMDGPU::EXEC).addReg(AMDGPU::EXEC);

13
test/CodeGen/R600/load.ll
View File

@ -446,6 +446,7 @@ define void @load_const_addrspace_f32(float addrspace(1)* %out, float addrspace(
; R600-CHECK: @load_i8_local ; R600-CHECK: @load_i8_local
; R600-CHECK: LDS_UBYTE_READ_RET ; R600-CHECK: LDS_UBYTE_READ_RET
; SI-CHECK: @load_i8_local ; SI-CHECK: @load_i8_local
; SI-CHECK-NOT: S_WQM_B64
; SI-CHECK: DS_READ_U8 ; SI-CHECK: DS_READ_U8
define void @load_i8_local(i32 addrspace(1)* %out, i8 addrspace(3)* %in) { define void @load_i8_local(i32 addrspace(1)* %out, i8 addrspace(3)* %in) {
%1 = load i8 addrspace(3)* %in %1 = load i8 addrspace(3)* %in
@ -458,6 +459,7 @@ define void @load_i8_local(i32 addrspace(1)* %out, i8 addrspace(3)* %in) {
; R600-CHECK: LDS_UBYTE_READ_RET ; R600-CHECK: LDS_UBYTE_READ_RET
; R600-CHECK: ASHR ; R600-CHECK: ASHR
; SI-CHECK: @load_i8_sext_local ; SI-CHECK: @load_i8_sext_local
; SI-CHECK-NOT: S_WQM_B64
; SI-CHECK: DS_READ_I8 ; SI-CHECK: DS_READ_I8
define void @load_i8_sext_local(i32 addrspace(1)* %out, i8 addrspace(3)* %in) { define void @load_i8_sext_local(i32 addrspace(1)* %out, i8 addrspace(3)* %in) {
entry: entry:
@ -471,6 +473,7 @@ entry:
; R600-CHECK: LDS_UBYTE_READ_RET ; R600-CHECK: LDS_UBYTE_READ_RET
; R600-CHECK: LDS_UBYTE_READ_RET ; R600-CHECK: LDS_UBYTE_READ_RET
; SI-CHECK: @load_v2i8_local ; SI-CHECK: @load_v2i8_local
; SI-CHECK-NOT: S_WQM_B64
; SI-CHECK: DS_READ_U8 ; SI-CHECK: DS_READ_U8
; SI-CHECK: DS_READ_U8 ; SI-CHECK: DS_READ_U8
define void @load_v2i8_local(<2 x i32> addrspace(1)* %out, <2 x i8> addrspace(3)* %in) { define void @load_v2i8_local(<2 x i32> addrspace(1)* %out, <2 x i8> addrspace(3)* %in) {
@ -487,6 +490,7 @@ entry:
; R600-CHECK-DAG: ASHR ; R600-CHECK-DAG: ASHR
; R600-CHECK-DAG: ASHR ; R600-CHECK-DAG: ASHR
; SI-CHECK: @load_v2i8_sext_local ; SI-CHECK: @load_v2i8_sext_local
; SI-CHECK-NOT: S_WQM_B64
; SI-CHECK: DS_READ_I8 ; SI-CHECK: DS_READ_I8
; SI-CHECK: DS_READ_I8 ; SI-CHECK: DS_READ_I8
define void @load_v2i8_sext_local(<2 x i32> addrspace(1)* %out, <2 x i8> addrspace(3)* %in) { define void @load_v2i8_sext_local(<2 x i32> addrspace(1)* %out, <2 x i8> addrspace(3)* %in) {
@ -503,6 +507,7 @@ entry:
; R600-CHECK: LDS_UBYTE_READ_RET ; R600-CHECK: LDS_UBYTE_READ_RET
; R600-CHECK: LDS_UBYTE_READ_RET ; R600-CHECK: LDS_UBYTE_READ_RET
; SI-CHECK: @load_v4i8_local ; SI-CHECK: @load_v4i8_local
; SI-CHECK-NOT: S_WQM_B64
; SI-CHECK: DS_READ_U8 ; SI-CHECK: DS_READ_U8
; SI-CHECK: DS_READ_U8 ; SI-CHECK: DS_READ_U8
; SI-CHECK: DS_READ_U8 ; SI-CHECK: DS_READ_U8
@ -525,6 +530,7 @@ entry:
; R600-CHECK-DAG: ASHR ; R600-CHECK-DAG: ASHR
; R600-CHECK-DAG: ASHR ; R600-CHECK-DAG: ASHR
; SI-CHECK: @load_v4i8_sext_local ; SI-CHECK: @load_v4i8_sext_local
; SI-CHECK-NOT: S_WQM_B64
; SI-CHECK: DS_READ_I8 ; SI-CHECK: DS_READ_I8
; SI-CHECK: DS_READ_I8 ; SI-CHECK: DS_READ_I8
; SI-CHECK: DS_READ_I8 ; SI-CHECK: DS_READ_I8
@ -541,6 +547,7 @@ entry:
; R600-CHECK: @load_i16_local ; R600-CHECK: @load_i16_local
; R600-CHECK: LDS_USHORT_READ_RET ; R600-CHECK: LDS_USHORT_READ_RET
; SI-CHECK: @load_i16_local ; SI-CHECK: @load_i16_local
; SI-CHECK-NOT: S_WQM_B64
; SI-CHECK: DS_READ_U16 ; SI-CHECK: DS_READ_U16
define void @load_i16_local(i32 addrspace(1)* %out, i16 addrspace(3)* %in) { define void @load_i16_local(i32 addrspace(1)* %out, i16 addrspace(3)* %in) {
entry: entry:
@ -554,6 +561,7 @@ entry:
; R600-CHECK: LDS_USHORT_READ_RET ; R600-CHECK: LDS_USHORT_READ_RET
; R600-CHECK: ASHR ; R600-CHECK: ASHR
; SI-CHECK: @load_i16_sext_local ; SI-CHECK: @load_i16_sext_local
; SI-CHECK-NOT: S_WQM_B64
; SI-CHECK: DS_READ_I16 ; SI-CHECK: DS_READ_I16
define void @load_i16_sext_local(i32 addrspace(1)* %out, i16 addrspace(3)* %in) { define void @load_i16_sext_local(i32 addrspace(1)* %out, i16 addrspace(3)* %in) {
entry: entry:
@ -567,6 +575,7 @@ entry:
; R600-CHECK: LDS_USHORT_READ_RET ; R600-CHECK: LDS_USHORT_READ_RET
; R600-CHECK: LDS_USHORT_READ_RET ; R600-CHECK: LDS_USHORT_READ_RET
; SI-CHECK: @load_v2i16_local ; SI-CHECK: @load_v2i16_local
; SI-CHECK-NOT: S_WQM_B64
; SI-CHECK: DS_READ_U16 ; SI-CHECK: DS_READ_U16
; SI-CHECK: DS_READ_U16 ; SI-CHECK: DS_READ_U16
define void @load_v2i16_local(<2 x i32> addrspace(1)* %out, <2 x i16> addrspace(3)* %in) { define void @load_v2i16_local(<2 x i32> addrspace(1)* %out, <2 x i16> addrspace(3)* %in) {
@ -583,6 +592,7 @@ entry:
; R600-CHECK-DAG: ASHR ; R600-CHECK-DAG: ASHR
; R600-CHECK-DAG: ASHR ; R600-CHECK-DAG: ASHR
; SI-CHECK: @load_v2i16_sext_local ; SI-CHECK: @load_v2i16_sext_local
; SI-CHECK-NOT: S_WQM_B64
; SI-CHECK: DS_READ_I16 ; SI-CHECK: DS_READ_I16
; SI-CHECK: DS_READ_I16 ; SI-CHECK: DS_READ_I16
define void @load_v2i16_sext_local(<2 x i32> addrspace(1)* %out, <2 x i16> addrspace(3)* %in) { define void @load_v2i16_sext_local(<2 x i32> addrspace(1)* %out, <2 x i16> addrspace(3)* %in) {
@ -599,6 +609,7 @@ entry:
; R600-CHECK: LDS_USHORT_READ_RET ; R600-CHECK: LDS_USHORT_READ_RET
; R600-CHECK: LDS_USHORT_READ_RET ; R600-CHECK: LDS_USHORT_READ_RET
; SI-CHECK: @load_v4i16_local ; SI-CHECK: @load_v4i16_local
; SI-CHECK-NOT: S_WQM_B64
; SI-CHECK: DS_READ_U16 ; SI-CHECK: DS_READ_U16
; SI-CHECK: DS_READ_U16 ; SI-CHECK: DS_READ_U16
; SI-CHECK: DS_READ_U16 ; SI-CHECK: DS_READ_U16
@ -621,6 +632,7 @@ entry:
; R600-CHECK-DAG: ASHR ; R600-CHECK-DAG: ASHR
; R600-CHECK-DAG: ASHR ; R600-CHECK-DAG: ASHR
; SI-CHECK: @load_v4i16_sext_local ; SI-CHECK: @load_v4i16_sext_local
; SI-CHECK-NOT: S_WQM_B64
; SI-CHECK: DS_READ_I16 ; SI-CHECK: DS_READ_I16
; SI-CHECK: DS_READ_I16 ; SI-CHECK: DS_READ_I16
; SI-CHECK: DS_READ_I16 ; SI-CHECK: DS_READ_I16
@ -637,6 +649,7 @@ entry:
; R600-CHECK: @load_i32_local ; R600-CHECK: @load_i32_local
; R600-CHECK: LDS_READ_RET ; R600-CHECK: LDS_READ_RET
; SI-CHECK: @load_i32_local ; SI-CHECK: @load_i32_local
; SI-CHECK-NOT: S_WQM_B64
; SI-CHECK: DS_READ_B32 ; SI-CHECK: DS_READ_B32
define void @load_i32_local(i32 addrspace(1)* %out, i32 addrspace(3)* %in) { define void @load_i32_local(i32 addrspace(1)* %out, i32 addrspace(3)* %in) {
entry: entry:

1
test/CodeGen/R600/local-memory.ll
View File

@ -13,6 +13,7 @@
; SI-CHECK-NEXT: .long 32768 ; SI-CHECK-NEXT: .long 32768
; EG-CHECK: LDS_WRITE ; EG-CHECK: LDS_WRITE
; SI-CHECK_NOT: S_WQM_B64
; SI-CHECK: DS_WRITE_B32 0 ; SI-CHECK: DS_WRITE_B32 0
; GROUP_BARRIER must be the last instruction in a clause ; GROUP_BARRIER must be the last instruction in a clause