From 41e1c04201875373f67717c639a6972e23b3816e Mon Sep 17 00:00:00 2001 From: Daniel Sanders Date: Fri, 17 Jan 2014 15:40:05 +0000 Subject: [PATCH] [mips][msa] Correct pattern for LSA Summary: $rs and $rt were the wrong way round in the .td and the testcase wasn't strict enough to detect the mistake. Reviewers: matheusalmeida Reviewed By: matheusalmeida Differential Revision: http://llvm-reviews.chandlerc.com/D2554 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199498 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/Mips/MipsMSAInstrInfo.td | 4 ++-- test/CodeGen/Mips/msa/special.ll | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/lib/Target/Mips/MipsMSAInstrInfo.td b/lib/Target/Mips/MipsMSAInstrInfo.td index 59b771f70b2..fbcd10fe2b8 100644 --- a/lib/Target/Mips/MipsMSAInstrInfo.td +++ b/lib/Target/Mips/MipsMSAInstrInfo.td @@ -2297,8 +2297,8 @@ class LSA_DESC { dag OutOperandList = (outs GPR32Opnd:$rd); dag InOperandList = (ins GPR32Opnd:$rs, GPR32Opnd:$rt, LSAImm:$sa); string AsmString = "lsa\t$rd, $rs, $rt, $sa"; - list Pattern = [(set GPR32Opnd:$rd, (add GPR32Opnd:$rs, - (shl GPR32Opnd:$rt, + list Pattern = [(set GPR32Opnd:$rd, (add GPR32Opnd:$rt, + (shl GPR32Opnd:$rs, immZExt2Lsa:$sa)))]; InstrItinClass Itinerary = NoItinerary; } diff --git a/test/CodeGen/Mips/msa/special.ll b/test/CodeGen/Mips/msa/special.ll index 60a4369dfb1..90f6172b4bd 100644 --- a/test/CodeGen/Mips/msa/special.ll +++ b/test/CodeGen/Mips/msa/special.ll @@ -11,7 +11,7 @@ entry: declare i32 @llvm.mips.lsa(i32, i32, i32) nounwind ; CHECK: llvm_mips_lsa_test: -; CHECK: lsa {{\$[0-9]+}}, {{\$[0-9]+}}, {{\$[0-9]+}}, 2 +; CHECK: lsa {{\$[0-9]+}}, $5, $4, 2 ; CHECK: .size llvm_mips_lsa_test define i32 @lsa_test(i32 %a, i32 %b) nounwind { @@ -22,5 +22,5 @@ entry: } ; CHECK: lsa_test: -; CHECK: lsa {{\$[0-9]+}}, {{\$[0-9]+}}, {{\$[0-9]+}}, 2 +; CHECK: lsa {{\$[0-9]+}}, $5, $4, 2 ; CHECK: .size lsa_test