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Revert r119593 while I figure out my testing disagrees with the buildbot.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119597 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Owen Anderson 2010-11-18 00:42:51 +00:00
parent 9c9fcfc719
commit 424216453f
2 changed files with 26 additions and 48 deletions
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69
lib/Target/ARM/ARMInstrThumb2.td
View File

@ -384,21 +384,6 @@ class T2sTwoRegShiftedReg<dag oops, dag iops, InstrItinClass itin,
let Inst{7-6} = ShiftedRm{8-7}; let Inst{7-6} = ShiftedRm{8-7};
} }
class T2FourReg<dag oops, dag iops, InstrItinClass itin,
string opc, string asm, list<dag> pattern>
: T2sI<oops, iops, itin, opc, asm, pattern> {
bits<4> Rd;
bits<4> Rn;
bits<4> Rm;
bits<4> Ra;
let Inst{11-8} = Rd{3-0};
let Inst{19-16} = Rn{3-0};
let Inst{3-0} = Rm{3-0};
let Inst{15-12} = Ra{3-0};
}
/// T2I_un_irs - Defines a set of (op reg, {so_imm|r|so_reg}) patterns for a /// T2I_un_irs - Defines a set of (op reg, {so_imm|r|so_reg}) patterns for a
/// unary operation that produces a value. These are predicable and can be /// unary operation that produces a value. These are predicable and can be
/// changed to modify CPSR. /// changed to modify CPSR.
@ -2102,9 +2087,9 @@ def : T2Pat<(t2_so_imm_not:$src),
// Multiply Instructions. // Multiply Instructions.
// //
let isCommutable = 1 in let isCommutable = 1 in
def t2MUL: T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iMUL32, def t2MUL: T2I<(outs rGPR:$dst), (ins rGPR:$a, rGPR:$b), IIC_iMUL32,
"mul", "\t$Rd, $Rn, $Rm", "mul", "\t$dst, $a, $b",
[(set rGPR:$Rd, (mul rGPR:$Rn, rGPR:$Rm))]> { [(set rGPR:$dst, (mul rGPR:$a, rGPR:$b))]> {
let Inst{31-27} = 0b11111; let Inst{31-27} = 0b11111;
let Inst{26-23} = 0b0110; let Inst{26-23} = 0b0110;
let Inst{22-20} = 0b000; let Inst{22-20} = 0b000;
@ -2112,43 +2097,41 @@ def t2MUL: T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iMUL32,
let Inst{7-4} = 0b0000; // Multiply let Inst{7-4} = 0b0000; // Multiply
} }
def t2MLA: T2FourReg< def t2MLA: T2I<(outs rGPR:$dst), (ins rGPR:$a, rGPR:$b, rGPR:$c), IIC_iMAC32,
(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC32, "mla", "\t$dst, $a, $b, $c",
"mla", "\t$Rd, $Rn, $Rm, $Ra", [(set rGPR:$dst, (add (mul rGPR:$a, rGPR:$b), rGPR:$c))]> {
[(set rGPR:$Rd, (add (mul rGPR:$Rn, rGPR:$Rm), rGPR:$Ra))]> {
let Inst{31-27} = 0b11111; let Inst{31-27} = 0b11111;
let Inst{26-23} = 0b0110; let Inst{26-23} = 0b0110;
let Inst{22-20} = 0b000; let Inst{22-20} = 0b000;
let Inst{15-12} = {?, ?, ?, ?}; // Ra
let Inst{7-4} = 0b0000; // Multiply let Inst{7-4} = 0b0000; // Multiply
} }
def t2MLS: T2FourReg< def t2MLS: T2I<(outs rGPR:$dst), (ins rGPR:$a, rGPR:$b, rGPR:$c), IIC_iMAC32,
(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC32, "mls", "\t$dst, $a, $b, $c",
"mls", "\t$Rd, $Rn, $Rm, $Ra", [(set rGPR:$dst, (sub rGPR:$c, (mul rGPR:$a, rGPR:$b)))]> {
[(set rGPR:$Rd, (sub rGPR:$Ra, (mul rGPR:$Rn, rGPR:$Rm)))]> {
let Inst{31-27} = 0b11111; let Inst{31-27} = 0b11111;
let Inst{26-23} = 0b0110; let Inst{26-23} = 0b0110;
let Inst{22-20} = 0b000; let Inst{22-20} = 0b000;
let Inst{15-12} = {?, ?, ?, ?}; // Ra
let Inst{7-4} = 0b0001; // Multiply and Subtract let Inst{7-4} = 0b0001; // Multiply and Subtract
} }
// Extra precision multiplies with low / high results // Extra precision multiplies with low / high results
let neverHasSideEffects = 1 in { let neverHasSideEffects = 1 in {
let isCommutable = 1 in { let isCommutable = 1 in {
def t2SMULL : T2FourReg< def t2SMULL : T2I<(outs rGPR:$ldst, rGPR:$hdst),
(outs rGPR:$Rd, rGPR:$Ra), (ins rGPR:$a, rGPR:$b), IIC_iMUL64,
(ins rGPR:$Rn, rGPR:$Rm), IIC_iMUL64, "smull", "\t$ldst, $hdst, $a, $b", []> {
"smull", "\t$Rd, $Ra, $Rn, $Rm", []> {
let Inst{31-27} = 0b11111; let Inst{31-27} = 0b11111;
let Inst{26-23} = 0b0111; let Inst{26-23} = 0b0111;
let Inst{22-20} = 0b000; let Inst{22-20} = 0b000;
let Inst{7-4} = 0b0000; let Inst{7-4} = 0b0000;
} }
def t2UMULL : T2FourReg< def t2UMULL : T2I<(outs rGPR:$ldst, rGPR:$hdst),
(outs rGPR:$Rd, rGPR:$Ra), (ins rGPR:$a, rGPR:$b), IIC_iMUL64,
(ins rGPR:$Rn, rGPR:$Rm), IIC_iMUL64, "umull", "\t$ldst, $hdst, $a, $b", []> {
"umull", "\t$Rd, $Ra, $Rn, $Rm", []> {
let Inst{31-27} = 0b11111; let Inst{31-27} = 0b11111;
let Inst{26-23} = 0b0111; let Inst{26-23} = 0b0111;
let Inst{22-20} = 0b010; let Inst{22-20} = 0b010;
@ -2157,27 +2140,27 @@ def t2UMULL : T2FourReg<
} // isCommutable } // isCommutable
// Multiply + accumulate // Multiply + accumulate
def t2SMLAL : T2FourReg<(outs rGPR:$Rd, rGPR:$Ra), def t2SMLAL : T2I<(outs rGPR:$ldst, rGPR:$hdst),
(ins rGPR:$Rn, rGPR:$Rm), IIC_iMAC64, (ins rGPR:$a, rGPR:$b), IIC_iMAC64,
"smlal", "\t$Rd, $Ra, $Rn, $Rm", []>{ "smlal", "\t$ldst, $hdst, $a, $b", []>{
let Inst{31-27} = 0b11111; let Inst{31-27} = 0b11111;
let Inst{26-23} = 0b0111; let Inst{26-23} = 0b0111;
let Inst{22-20} = 0b100; let Inst{22-20} = 0b100;
let Inst{7-4} = 0b0000; let Inst{7-4} = 0b0000;
} }
def t2UMLAL : T2FourReg<(outs rGPR:$Rd, rGPR:$Ra), def t2UMLAL : T2I<(outs rGPR:$ldst, rGPR:$hdst),
(ins rGPR:$Rn, rGPR:$Rm), IIC_iMAC64, (ins rGPR:$a, rGPR:$b), IIC_iMAC64,
"umlal", "\t$Rd, $Ra, $Rn, $Rm", []>{ "umlal", "\t$ldst, $hdst, $a, $b", []>{
let Inst{31-27} = 0b11111; let Inst{31-27} = 0b11111;
let Inst{26-23} = 0b0111; let Inst{26-23} = 0b0111;
let Inst{22-20} = 0b110; let Inst{22-20} = 0b110;
let Inst{7-4} = 0b0000; let Inst{7-4} = 0b0000;
} }
def t2UMAAL : T2FourReg<(outs rGPR:$Rd, rGPR:$Ra), def t2UMAAL : T2I<(outs rGPR:$ldst, rGPR:$hdst),
(ins rGPR:$Rn, rGPR:$Rm), IIC_iMAC64, (ins rGPR:$a, rGPR:$b), IIC_iMAC64,
"umaal", "\t$Rd, $Ra, $Rn, $Rm", []>{ "umaal", "\t$ldst, $hdst, $a, $b", []>{
let Inst{31-27} = 0b11111; let Inst{31-27} = 0b11111;
let Inst{26-23} = 0b0111; let Inst{26-23} = 0b0111;
let Inst{22-20} = 0b110; let Inst{22-20} = 0b110;

5
test/MC/ARM/thumb2.s
View File

@ -63,8 +63,3 @@
sbfx r0, r0, #7, #11 sbfx r0, r0, #7, #11
@ CHECK: ubfx r0, r0, #7, #11 @ encoding: [0xca,0x10,0xc0,0xf3] @ CHECK: ubfx r0, r0, #7, #11 @ encoding: [0xca,0x10,0xc0,0xf3]
ubfx r0, r0, #7, #11 ubfx r0, r0, #7, #11
@ CHECK: mla r0, r0, r1, r2 @ encoding: [0x01,0x20,0x00,0xfb]
mla r0, r0, r1, r2
@ CHECK: mls r0, r0, r1, r2 @ encoding: [0x11,0x20,0x00,0xfb]
mls r0, r0, r1, r2