-modified machine operand class - took regNum out of union to set regNum after

retister allocation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@594 91177308-0d34-0410-b5e6-96231b3b80d8

include/llvm/CodeGen/MachineInstr.h

@@ -80,12 +80,11 @@ private:
 				// Virtual register for an SSA operand,
 				// including hidden operands required for
 				// the generated machine code.     
-    
-    unsigned int regNum;	// register number for an explicit register
-  
     int64_t immedVal;		// constant value for an explicit constant
   };
 
+  unsigned int regNum;	        // register number for an explicit register
+                                // will be set for a value after reg allocation
   bool isDef;                   // is this a defition for the value
                                 // made public for faster access
   
@@ -141,6 +140,13 @@ private:
 
 public:
 
+  // replaces the Value with its corresponding physical register afeter
+  // register allocation is complete
+  void setRegForValue(unsigned reg) {
+    assert(opType == MO_VirtualRegister || opType == MO_CCRegister);
+    regNum = reg;
+  }
+
  
 };