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Need to specify SSE4 for machines which don't have SSE4. The code checked for is generated by SSE4. Otherwise, we get something else.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115352 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bill Wendling 2010-10-01 21:39:35 +00:00
parent e6ca6771e3
commit 43c78cda10
2 changed files with 6 additions and 6 deletions
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6
test/CodeGen/X86/mmx-punpckhdq.ll
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@ -1,9 +1,9 @@
; RUN: llc < %s -march=x86 -mattr=+mmx,+sse2 -mtriple=x86_64-apple-darwin10 | FileCheck %s
; RUN: llc < %s -march=x86 -mattr=+mmx,+sse42 -mtriple=x86_64-apple-darwin10 | FileCheck %s
; There are no MMX operations in bork; promoted to XMM.
define void @bork(<1 x i64>* %x) {
; CHECK: bork
; FIXMEHECK: pextrd
; CHECK: pextrd
entry:
%tmp2 = load <1 x i64>* %x ; <<1 x i64>> [#uses=1]
%tmp6 = bitcast <1 x i64> %tmp2 to <2 x i32> ; <<2 x i32>> [#uses=1]
@ -18,7 +18,7 @@ entry:
define void @pork(x86_mmx* %x) {
; CHECK: pork
; FIXMEHECK: punpckhdq
; CHECK: punpckhdq
entry:
%tmp2 = load x86_mmx* %x ; <x86_mmx> [#uses=1]
%tmp9 = tail call x86_mmx @llvm.x86.mmx.punpckhdq (x86_mmx %tmp2, x86_mmx %tmp2)

6
test/CodeGen/X86/vec_insert-7.ll
View File

@ -1,12 +1,12 @@
; RUN: llc < %s -march=x86 -mattr=+mmx,+sse2 -mtriple=i686-apple-darwin9 | FileCheck %s
; RUN: llc < %s -march=x86 -mattr=+mmx,+sse42 -mtriple=i686-apple-darwin9 | FileCheck %s
; MMX insertelement is not available; these are promoted to XMM.
; (Without SSE they are split to two ints, and the code is much better.)
define x86_mmx @mmx_movzl(x86_mmx %x) nounwind {
entry:
; CHECK: mmx_movzl
; FIXMEHECK: pinsrd
; FIXMEHECK: pinsrd
; CHECK: pinsrd
; CHECK: pinsrd
%tmp = bitcast x86_mmx %x to <2 x i32>
%tmp3 = insertelement <2 x i32> %tmp, i32 32, i32 0 ; <<2 x i32>> [#uses=1]
%tmp8 = insertelement <2 x i32> %tmp3, i32 0, i32 1 ; <<2 x i32>> [#uses=1]