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Change errs() to dbgs().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92595 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -296,11 +296,11 @@ void RALocal::spillVirtReg(MachineBasicBlock &MBB,
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assert(VirtReg && "Spilling a physical register is illegal!"
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" Must not have appropriate kill for the register or use exists beyond"
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" the intended one.");
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DEBUG(errs() << " Spilling register " << TRI->getName(PhysReg)
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DEBUG(dbgs() << " Spilling register " << TRI->getName(PhysReg)
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<< " containing %reg" << VirtReg);
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if (!isVirtRegModified(VirtReg)) {
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DEBUG(errs() << " which has not been modified, so no store necessary!");
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DEBUG(dbgs() << " which has not been modified, so no store necessary!");
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std::pair<MachineInstr*, unsigned> &LastUse = getVirtRegLastUse(VirtReg);
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if (LastUse.first)
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LastUse.first->getOperand(LastUse.second).setIsKill();
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@ -310,7 +310,7 @@ void RALocal::spillVirtReg(MachineBasicBlock &MBB,
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// modified.
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const TargetRegisterClass *RC = MF->getRegInfo().getRegClass(VirtReg);
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int FrameIndex = getStackSpaceFor(VirtReg, RC);
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DEBUG(errs() << " to stack slot #" << FrameIndex);
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DEBUG(dbgs() << " to stack slot #" << FrameIndex);
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// If the instruction reads the register that's spilled, (e.g. this can
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// happen if it is a move to a physical register), then the spill
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// instruction is not a kill.
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@ -321,7 +321,7 @@ void RALocal::spillVirtReg(MachineBasicBlock &MBB,
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getVirt2PhysRegMapSlot(VirtReg) = 0; // VirtReg no longer available
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DEBUG(errs() << '\n');
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DEBUG(dbgs() << '\n');
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removePhysReg(PhysReg);
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}
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@ -516,7 +516,7 @@ MachineInstr *RALocal::reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI,
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markVirtRegModified(VirtReg, false); // Note that this reg was just reloaded
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DEBUG(errs() << " Reloading %reg" << VirtReg << " into "
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DEBUG(dbgs() << " Reloading %reg" << VirtReg << " into "
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<< TRI->getName(PhysReg) << "\n");
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// Add move instruction(s)
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@ -725,7 +725,7 @@ void RALocal::AllocateBasicBlock(MachineBasicBlock &MBB) {
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DEBUG({
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const BasicBlock *LBB = MBB.getBasicBlock();
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if (LBB)
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errs() << "\nStarting RegAlloc of BB: " << LBB->getName();
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dbgs() << "\nStarting RegAlloc of BB: " << LBB->getName();
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});
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// Add live-in registers as active.
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@ -752,13 +752,13 @@ void RALocal::AllocateBasicBlock(MachineBasicBlock &MBB) {
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MachineInstr *MI = MII++;
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const TargetInstrDesc &TID = MI->getDesc();
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DEBUG({
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errs() << "\nStarting RegAlloc of: " << *MI;
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errs() << " Regs have values: ";
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dbgs() << "\nStarting RegAlloc of: " << *MI;
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dbgs() << " Regs have values: ";
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for (unsigned i = 0; i != TRI->getNumRegs(); ++i)
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if (PhysRegsUsed[i] != -1 && PhysRegsUsed[i] != -2)
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errs() << "[" << TRI->getName(i)
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dbgs() << "[" << TRI->getName(i)
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<< ",%reg" << PhysRegsUsed[i] << "] ";
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errs() << '\n';
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dbgs() << '\n';
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});
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// Determine whether this is a copy instruction. The cases where the
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@ -809,7 +809,7 @@ void RALocal::AllocateBasicBlock(MachineBasicBlock &MBB) {
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markVirtRegModified(DestVirtReg);
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getVirtRegLastUse(DestVirtReg) =
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std::make_pair((MachineInstr*)0, 0);
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DEBUG(errs() << " Assigning " << TRI->getName(DestPhysReg)
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DEBUG(dbgs() << " Assigning " << TRI->getName(DestPhysReg)
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<< " to %reg" << DestVirtReg << "\n");
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MO.setReg(DestPhysReg); // Assign the earlyclobber register
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} else {
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@ -876,13 +876,13 @@ void RALocal::AllocateBasicBlock(MachineBasicBlock &MBB) {
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}
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if (PhysReg) {
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DEBUG(errs() << " Last use of " << TRI->getName(PhysReg)
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DEBUG(dbgs() << " Last use of " << TRI->getName(PhysReg)
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<< "[%reg" << VirtReg <<"], removing it from live set\n");
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removePhysReg(PhysReg);
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for (const unsigned *SubRegs = TRI->getSubRegisters(PhysReg);
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*SubRegs; ++SubRegs) {
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if (PhysRegsUsed[*SubRegs] != -2) {
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DEBUG(errs() << " Last use of "
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DEBUG(dbgs() << " Last use of "
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<< TRI->getName(*SubRegs) << "[%reg" << VirtReg
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<<"], removing it from live set\n");
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removePhysReg(*SubRegs);
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@ -978,7 +978,7 @@ void RALocal::AllocateBasicBlock(MachineBasicBlock &MBB) {
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MF->getRegInfo().setPhysRegUsed(DestPhysReg);
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markVirtRegModified(DestVirtReg);
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getVirtRegLastUse(DestVirtReg) = std::make_pair((MachineInstr*)0, 0);
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DEBUG(errs() << " Assigning " << TRI->getName(DestPhysReg)
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DEBUG(dbgs() << " Assigning " << TRI->getName(DestPhysReg)
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<< " to %reg" << DestVirtReg << "\n");
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MO.setReg(DestPhysReg); // Assign the output register
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}
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@ -1001,14 +1001,14 @@ void RALocal::AllocateBasicBlock(MachineBasicBlock &MBB) {
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}
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if (PhysReg) {
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DEBUG(errs() << " Register " << TRI->getName(PhysReg)
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DEBUG(dbgs() << " Register " << TRI->getName(PhysReg)
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<< " [%reg" << VirtReg
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<< "] is never used, removing it from live set\n");
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removePhysReg(PhysReg);
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for (const unsigned *AliasSet = TRI->getAliasSet(PhysReg);
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*AliasSet; ++AliasSet) {
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if (PhysRegsUsed[*AliasSet] != -2) {
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DEBUG(errs() << " Register " << TRI->getName(*AliasSet)
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DEBUG(dbgs() << " Register " << TRI->getName(*AliasSet)
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<< " [%reg" << *AliasSet
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<< "] is never used, removing it from live set\n");
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removePhysReg(*AliasSet);
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@ -1058,7 +1058,7 @@ void RALocal::AllocateBasicBlock(MachineBasicBlock &MBB) {
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/// runOnMachineFunction - Register allocate the whole function
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///
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bool RALocal::runOnMachineFunction(MachineFunction &Fn) {
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DEBUG(errs() << "Machine Function\n");
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DEBUG(dbgs() << "Machine Function\n");
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MF = &Fn;
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TM = &Fn.getTarget();
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TRI = TM->getRegisterInfo();
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