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[SCEV] Assume parameters coming from function calls contain IVs
The optimistic delinearization implemented in LLVM detects array sizes by looking for non-linear products between parameters and induction variables. In OpenCL code, such products often look like: A[get_global_id(0) * N + get_global_id(1)] Hence, the IV is hidden in the get_global_id() call and consequently delinearization would fail as no induction variable is available that helps us to identify N as array size parameter. We now use a very simple heuristic to change this. We assume that each parameter that comes directly from a function call is a hidden induction variable. As a result, we can delinearize the access above to: A[get_global_id(0)][get_global_id(1] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304073 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -9590,8 +9590,11 @@ struct SCEVCollectAddRecMultiplies {
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bool HasAddRec = false;
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bool HasAddRec = false;
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SmallVector<const SCEV *, 0> Operands;
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SmallVector<const SCEV *, 0> Operands;
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for (auto Op : Mul->operands()) {
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for (auto Op : Mul->operands()) {
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if (isa<SCEVUnknown>(Op)) {
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const SCEVUnknown *Unknown = dyn_cast<SCEVUnknown>(Op);
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if (Unknown && !isa<CallInst>(Unknown->getValue())) {
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Operands.push_back(Op);
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Operands.push_back(Op);
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} else if (Unknown) {
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HasAddRec = true;
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} else {
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} else {
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bool ContainsAddRec;
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bool ContainsAddRec;
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SCEVHasAddRec ContiansAddRec(ContainsAddRec);
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SCEVHasAddRec ContiansAddRec(ContainsAddRec);
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@ -0,0 +1,80 @@
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; RUN: opt -delinearize -analyze < %s | FileCheck %s
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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; CHECK: Inst: %tmp = load float, float* %arrayidx, align 4
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; CHECK-NEXT: In Loop with Header: for.inc
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; CHECK-NEXT: AccessFunction: {(4 * %N * %call),+,4}<nsw><%for.inc>
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; CHECK-NEXT: Base offset: %A
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; CHECK-NEXT: ArrayDecl[UnknownSize][%N] with elements of 4 bytes.
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; CHECK-NEXT: ArrayRef[%call][{0,+,1}<nuw><nsw><%for.inc>]
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; CHECK: Inst: %tmp5 = load float, float* %arrayidx4, align 4
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; CHECK-NEXT: In Loop with Header: for.inc
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; CHECK-NEXT: AccessFunction: {(4 * %call1),+,(4 * %N)}<nsw><%for.inc>
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; CHECK-NEXT: Base offset: %B
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; CHECK-NEXT: ArrayDecl[UnknownSize][%N] with elements of 4 bytes.
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; CHECK-NEXT: ArrayRef[{0,+,1}<nuw><nsw><%for.inc>][%call1]
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; Function Attrs: noinline nounwind uwtable
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define void @mat_mul(float* %C, float* %A, float* %B, i64 %N) #0 !kernel_arg_addr_space !2 !kernel_arg_access_qual !3 !kernel_arg_type !4 !kernel_arg_base_type !4 !kernel_arg_type_qual !5 {
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entry:
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br label %entry.split
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entry.split: ; preds = %entry
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%call = tail call i64 @_Z13get_global_idj(i32 0) #3
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%call1 = tail call i64 @_Z13get_global_idj(i32 1) #3
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%cmp1 = icmp sgt i64 %N, 0
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%mul = mul nsw i64 %call, %N
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br i1 %cmp1, label %for.inc.lr.ph, label %for.end
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for.inc.lr.ph: ; preds = %entry.split
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br label %for.inc
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for.inc: ; preds = %for.inc.lr.ph, %for.inc
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%acc.03 = phi float [ 0.000000e+00, %for.inc.lr.ph ], [ %tmp6, %for.inc ]
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%m.02 = phi i64 [ 0, %for.inc.lr.ph ], [ %inc, %for.inc ]
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%add = add nsw i64 %m.02, %mul
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%arrayidx = getelementptr inbounds float, float* %A, i64 %add
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%tmp = load float, float* %arrayidx, align 4
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%mul2 = mul nsw i64 %m.02, %N
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%add3 = add nsw i64 %mul2, %call1
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%arrayidx4 = getelementptr inbounds float, float* %B, i64 %add3
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%tmp5 = load float, float* %arrayidx4, align 4
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%tmp6 = tail call float @llvm.fmuladd.f32(float %tmp, float %tmp5, float %acc.03)
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%inc = add nuw nsw i64 %m.02, 1
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%exitcond = icmp ne i64 %inc, %N
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br i1 %exitcond, label %for.inc, label %for.cond.for.end_crit_edge
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for.cond.for.end_crit_edge: ; preds = %for.inc
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%.lcssa = phi float [ %tmp6, %for.inc ]
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br label %for.end
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for.end: ; preds = %for.cond.for.end_crit_edge, %entry.split
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%acc.0.lcssa = phi float [ %.lcssa, %for.cond.for.end_crit_edge ], [ 0.000000e+00, %entry.split ]
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%add7 = add nsw i64 %mul, %call1
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%arrayidx8 = getelementptr inbounds float, float* %C, i64 %add7
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store float %acc.0.lcssa, float* %arrayidx8, align 4
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ret void
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}
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; Function Attrs: nounwind readnone
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declare i64 @_Z13get_global_idj(i32) #1
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; Function Attrs: nounwind readnone speculatable
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declare float @llvm.fmuladd.f32(float, float, float) #2
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attributes #0 = { noinline nounwind uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" }
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attributes #1 = { nounwind readnone "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" }
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attributes #2 = { nounwind readnone speculatable }
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attributes #3 = { nounwind readnone }
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!llvm.module.flags = !{!0}
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!llvm.ident = !{!1}
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!0 = !{i32 1, !"wchar_size", i32 4}
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!1 = !{!"clang version 5.0.0 (trunk 303846) (llvm/trunk 303834)"}
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!2 = !{i32 1, i32 1, i32 1, i32 0}
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!3 = !{!"none", !"none", !"none", !"none"}
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!4 = !{!"float*", !"float*", !"float*", !"long"}
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!5 = !{!"", !"", !"", !""}
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