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don't create the post-ra scheduler unless it is enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45972 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -41,6 +41,12 @@ PerformLICM("machine-licm",
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cl::init(false), cl::Hidden,
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cl::desc("Perform loop-invariant code motion on machine code"));
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// When this works it will be on by default.
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static cl::opt<bool>
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DisablePostRAScheduler("disable-post-RA-scheduler",
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cl::desc("Disable scheduling after register allocation"),
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cl::init(true));
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FileModel::Model
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LLVMTargetMachine::addPassesToEmitFile(FunctionPassManager &PM,
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std::ostream &Out,
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@ -103,7 +109,7 @@ LLVMTargetMachine::addPassesToEmitFile(FunctionPassManager &PM,
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PM.add(createPrologEpilogCodeInserter());
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// Second pass scheduler.
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if (!Fast)
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if (!Fast && !DisablePostRAScheduler)
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PM.add(createPostRAScheduler());
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// Branch folding must be run after regalloc and prolog/epilog insertion.
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@ -21,23 +21,11 @@
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#define DEBUG_TYPE "post-RA-sched"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/Support/Compiler.h"
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#include "llvm/Support/Debug.h"
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//#include "llvm/ADT/Statistic.h"
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//#include <climits>
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//#include <queue>
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#include "llvm/Support/CommandLine.h"
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using namespace llvm;
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namespace {
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bool NoPostRAScheduling;
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// When this works it will be on by default.
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cl::opt<bool, true>
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DisablePostRAScheduler("disable-post-RA-scheduler",
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cl::desc("Disable scheduling after register allocation"),
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cl::location(NoPostRAScheduling),
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cl::init(true));
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class VISIBILITY_HIDDEN SchedulePostRATDList : public MachineFunctionPass {
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public:
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static char ID;
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@ -56,9 +44,6 @@ namespace {
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}
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bool SchedulePostRATDList::runOnMachineFunction(MachineFunction &Fn) {
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if (NoPostRAScheduling)
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return true;
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DOUT << "SchedulePostRATDList\n";
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MF = &Fn;
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TM = &MF->getTarget();
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