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[Hexagon] Marking several instructions as isCodeGenOnly=0 and adding direct disassembly tests for many instructions.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223482 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Colin LeMahieu 2014-12-05 17:27:39 +00:00
parent 33f1a430c2
commit 4c58675d35
4 changed files with 42 additions and 4 deletions
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5
lib/Target/Hexagon/HexagonInstrInfo.td
View File

@ -319,6 +319,7 @@ multiclass ZXTB_base <string mnemonic, bits<3> minOp> {
}
}
let isCodeGenOnly=0 in
defm zxtb : ZXTB_base<"zxtb",0b100>, PredNewRel;
let CextOpcode = "MUX", InputType = "reg", hasNewValue = 1 in
@ -434,7 +435,7 @@ def AND_ri : ALU32_ri<(outs IntRegs:$dst),
s10ExtPred:$src2))]>, ImmRegRel;
// Nop.
let hasSideEffects = 0 in
let hasSideEffects = 0, isCodeGenOnly = 0 in
def A2_nop: ALU32Inst <(outs), (ins), "nop" > {
let IClass = 0b0111;
let Inst{27-24} = 0b1111;
@ -676,7 +677,7 @@ class T_ALU32_3op_cmp<string mnemonic, bits<2> MinOp, bit IsNeg, bit IsComm>
let Inst{1-0} = Pd;
}
let Itinerary = ALU32_3op_tc_2early_SLOT0123 in {
let Itinerary = ALU32_3op_tc_2early_SLOT0123, isCodeGenOnly = 0 in {
def C2_cmpeq : T_ALU32_3op_cmp< "cmp.eq", 0b00, 0, 1>;
def C2_cmpgt : T_ALU32_3op_cmp< "cmp.gt", 0b10, 0, 0>;
def C2_cmpgtu : T_ALU32_3op_cmp< "cmp.gtu", 0b11, 0, 0>;

4
test/MC/Disassembler/Hexagon/alu32_alu.txt
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@ -1,5 +1,3 @@
# XFAIL: arm-windows
# XFAIL: arm-linux
# RUN: llvm-mc --triple hexagon -disassemble < %s | FileCheck %s
0x11 0xdf 0x15 0xf3
@ -10,6 +8,8 @@
# CHECK: r17 = or(r21, r31)
0x11 0xdf 0x75 0xf1
# CHECK: r17 = xor(r21, r31)
0x00 0xc0 0x00 0x7f
# CHECK: nop
0x11 0xdf 0x35 0xf3
# CHECK: r17 = sub(r31, r21)
0x11 0xc0 0xbf 0x70

6
test/MC/Disassembler/Hexagon/alu32_perm.txt Normal file
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@ -0,0 +1,6 @@
# RUN: llvm-mc --triple hexagon -disassemble < %s | FileCheck %s
0x11 0xc0 0x15 0x70
# CHECK: r17 = aslh(r21)
0x11 0xc0 0x35 0x70
# CHECK: r17 = asrh(r21)

31
test/MC/Disassembler/Hexagon/alu32_pred.txt Normal file
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@ -0,0 +1,31 @@
# RUN: llvm-mc --triple hexagon -disassemble < %s | FileCheck %s
0x71 0xdf 0x15 0xfb
# CHECK: if (p3) r17 = add(r21, r31)
0x11 0xe3 0x15 0x70
# CHECK: if (p3) r17 = aslh(r21)
0x11 0xe3 0x35 0x70
# CHECK: if (p3) r17 = asrh(r21)
0x71 0xdf 0x15 0xf9
# CHECK: if (p3) r17 = and(r21, r31)
0x71 0xdf 0x35 0xf9
# CHECK: if (p3) r17 = or(r21, r31)
0x71 0xdf 0x75 0xf9
# CHECK: if (p3) r17 = xor(r21, r31)
0x71 0xdf 0x35 0xfb
# CHECK: if (p3) r17 = sub(r31, r21)
0x11 0xe3 0xb5 0x70
# CHECK: if (p3) r17 = sxtb(r21)
0x11 0xe3 0xf5 0x70
# CHECK: if (p3) r17 = sxth(r21)
0x11 0xe3 0x95 0x70
# CHECK: if (p3) r17 = zxtb(r21)
0x11 0xe3 0xd5 0x70
# CHECK: if (p3) r17 = zxth(r21)
0x03 0xdf 0x15 0xf2
# CHECK: p3 = cmp.eq(r21, r31)
0x03 0xdf 0x55 0xf2
# CHECK: p3 = cmp.gt(r21, r31)
0x03 0xdf 0x75 0xf2
# CHECK: p3 = cmp.gtu(r21, r31)
0x11 0xdf 0x55 0xf3