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Relax assertion to make this function work with a broader class of instructions

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12836 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2004-04-11 20:21:06 +00:00
parent 427aeb476f
commit 4cf15e7a3b
2 changed files with 16 additions and 4 deletions
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10
lib/Target/X86/FloatingPoint.cpp
View File

@ -449,11 +449,17 @@ void FPS::handleOneArgFP(MachineBasicBlock::iterator &I) {
}
/// handleOneArgFPRW - fchs - ST(0) = -ST(0)
/// handleOneArgFPRW: Handle instructions that read from the top of stack and
/// replace the value with a newly computed value. These instructions may have
/// non-fp operands after their FP operands.
///
/// Examples:
/// R1 = fchs R2
/// R1 = fadd R2, [mem]
///
void FPS::handleOneArgFPRW(MachineBasicBlock::iterator &I) {
MachineInstr *MI = I;
assert(MI->getNumOperands() == 2 && "Can only handle fst* instructions!");
assert(MI->getNumOperands() >= 2 && "FPRW instructions must have 2 ops!!");
// Is this the last use of the source register?
unsigned Reg = getFPReg(MI->getOperand(1));

10
lib/Target/X86/X86FloatingPoint.cpp
View File

@ -449,11 +449,17 @@ void FPS::handleOneArgFP(MachineBasicBlock::iterator &I) {
}
/// handleOneArgFPRW - fchs - ST(0) = -ST(0)
/// handleOneArgFPRW: Handle instructions that read from the top of stack and
/// replace the value with a newly computed value. These instructions may have
/// non-fp operands after their FP operands.
///
/// Examples:
/// R1 = fchs R2
/// R1 = fadd R2, [mem]
///
void FPS::handleOneArgFPRW(MachineBasicBlock::iterator &I) {
MachineInstr *MI = I;
assert(MI->getNumOperands() == 2 && "Can only handle fst* instructions!");
assert(MI->getNumOperands() >= 2 && "FPRW instructions must have 2 ops!!");
// Is this the last use of the source register?
unsigned Reg = getFPReg(MI->getOperand(1));