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prune #includes a little.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108929 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -15,9 +15,9 @@
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#include "ARM.h"
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#include "ARMAddressingModes.h"
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#include "ARMConstantPoolValue.h"
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#include "ARMGenInstrInfo.inc"
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#include "ARMMachineFunctionInfo.h"
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#include "ARMRegisterInfo.h"
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#include "ARMGenInstrInfo.inc"
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#include "llvm/Constants.h"
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#include "llvm/Function.h"
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#include "llvm/GlobalValue.h"
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@ -15,11 +15,12 @@
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#define ARMBASEINSTRUCTIONINFO_H
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#include "ARM.h"
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#include "ARMRegisterInfo.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/Target/TargetInstrInfo.h"
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namespace llvm {
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class ARMSubtarget;
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class ARMBaseRegisterInfo;
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/// ARMII - This namespace holds all of the target specific flags that
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/// instruction info tracks.
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@ -198,7 +199,7 @@ namespace ARMII {
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}
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class ARMBaseInstrInfo : public TargetInstrInfoImpl {
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const ARMSubtarget& Subtarget;
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const ARMSubtarget &Subtarget;
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protected:
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// Can be only subclassed.
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explicit ARMBaseInstrInfo(const ARMSubtarget &STI);
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@ -44,7 +44,7 @@ static inline bool isARMLowRegister(unsigned Reg) {
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}
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}
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struct ARMBaseRegisterInfo : public ARMGenRegisterInfo {
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class ARMBaseRegisterInfo : public ARMGenRegisterInfo {
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protected:
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const ARMBaseInstrInfo &TII;
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const ARMSubtarget &STI;
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@ -19,7 +19,7 @@
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#include "ARMBaseInstrInfo.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/Target/TargetRegisterInfo.h"
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using namespace llvm;
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namespace {
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@ -23,7 +23,8 @@
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#include "llvm/MC/MCInst.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#include "ARMInstrInfo.h"
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#include "ARMBaseInstrInfo.h"
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#include "ARMRegisterInfo.h"
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#include "ARMDisassembler.h"
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namespace llvm {
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