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[Hexagon] Fix insertBranch for loops with multiple ENDLOOP instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293925 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -152,10 +152,11 @@ static unsigned nonDbgMICount(MachineBasicBlock::const_instr_iterator MIB,
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/// On Hexagon, we have two instructions used to set-up the hardware loop
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/// (LOOP0, LOOP1) with corresponding endloop (ENDLOOP0, ENDLOOP1) instructions
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/// to indicate the end of a loop.
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static MachineInstr *findLoopInstr(MachineBasicBlock *BB, int EndLoopOp,
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static MachineInstr *findLoopInstr(MachineBasicBlock *BB, unsigned EndLoopOp,
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MachineBasicBlock *TargetBB,
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SmallPtrSet<MachineBasicBlock *, 8> &Visited) {
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int LOOPi;
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int LOOPr;
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unsigned LOOPi;
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unsigned LOOPr;
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if (EndLoopOp == Hexagon::ENDLOOP0) {
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LOOPi = Hexagon::J2_loop0i;
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LOOPr = Hexagon::J2_loop0r;
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@ -165,26 +166,24 @@ static MachineInstr *findLoopInstr(MachineBasicBlock *BB, int EndLoopOp,
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}
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// The loop set-up instruction will be in a predecessor block
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for (MachineBasicBlock::pred_iterator PB = BB->pred_begin(),
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PE = BB->pred_end(); PB != PE; ++PB) {
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for (MachineBasicBlock *PB : BB->predecessors()) {
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// If this has been visited, already skip it.
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if (!Visited.insert(*PB).second)
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if (!Visited.insert(PB).second)
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continue;
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if (*PB == BB)
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if (PB == BB)
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continue;
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for (MachineBasicBlock::reverse_instr_iterator I = (*PB)->instr_rbegin(),
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E = (*PB)->instr_rend(); I != E; ++I) {
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int Opc = I->getOpcode();
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for (auto I = PB->instr_rbegin(), E = PB->instr_rend(); I != E; ++I) {
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unsigned Opc = I->getOpcode();
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if (Opc == LOOPi || Opc == LOOPr)
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return &*I;
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// We've reached a different loop, which means the loop0 has been removed.
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if (Opc == EndLoopOp)
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// We've reached a different loop, which means the loop01 has been
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// removed.
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if (Opc == EndLoopOp && I->getOperand(0).getMBB() != TargetBB)
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return nullptr;
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}
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// Check the predecessors for the LOOP instruction.
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MachineInstr *loop = findLoopInstr(*PB, EndLoopOp, Visited);
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if (loop)
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return loop;
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if (MachineInstr *Loop = findLoopInstr(PB, EndLoopOp, TargetBB, Visited))
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return Loop;
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}
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return nullptr;
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}
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@ -597,7 +596,8 @@ unsigned HexagonInstrInfo::insertBranch(MachineBasicBlock &MBB,
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// Since we're adding an ENDLOOP, there better be a LOOP instruction.
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// Check for it, and change the BB target if needed.
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SmallPtrSet<MachineBasicBlock *, 8> VisitedBBs;
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MachineInstr *Loop = findLoopInstr(TBB, EndLoopOp, VisitedBBs);
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MachineInstr *Loop = findLoopInstr(TBB, EndLoopOp, Cond[1].getMBB(),
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VisitedBBs);
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assert(Loop != 0 && "Inserting an ENDLOOP without a LOOP");
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Loop->getOperand(0).setMBB(TBB);
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// Add the ENDLOOP after the finding the LOOP0.
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@ -637,7 +637,12 @@ unsigned HexagonInstrInfo::insertBranch(MachineBasicBlock &MBB,
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// Since we're adding an ENDLOOP, there better be a LOOP instruction.
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// Check for it, and change the BB target if needed.
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SmallPtrSet<MachineBasicBlock *, 8> VisitedBBs;
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MachineInstr *Loop = findLoopInstr(TBB, EndLoopOp, VisitedBBs);
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MachineInstr *Loop = findLoopInstr(TBB, EndLoopOp, Cond[1].getMBB(),
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VisitedBBs);
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if (Loop == 0) {
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MachineFunction &MF = *MBB.getParent();
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MF.print(dbgs(), 0);
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}
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assert(Loop != 0 && "Inserting an ENDLOOP without a LOOP");
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Loop->getOperand(0).setMBB(TBB);
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// Add the ENDLOOP after the finding the LOOP0.
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@ -687,7 +692,8 @@ unsigned HexagonInstrInfo::reduceLoopCount(MachineBasicBlock &MBB,
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MachineFunction *MF = MBB.getParent();
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DebugLoc DL = Cmp.getDebugLoc();
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SmallPtrSet<MachineBasicBlock *, 8> VisitedBBs;
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MachineInstr *Loop = findLoopInstr(&MBB, Cmp.getOpcode(), VisitedBBs);
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MachineInstr *Loop = findLoopInstr(&MBB, Cmp.getOpcode(),
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Cmp.getOperand(0).getMBB(), VisitedBBs);
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if (!Loop)
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return 0;
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// If the loop trip count is a compile-time value, then just change the
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79
test/CodeGen/Hexagon/find-loop-instr.ll
Normal file
79
test/CodeGen/Hexagon/find-loop-instr.ll
Normal file
@ -0,0 +1,79 @@
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; RUN: llc -march=hexagon < %s
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; REQUIRES: asserts
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; This code causes multiple endloop instructions to be generated for the
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; same loop. The findLoopInstr would encounter for one endloop would encounter
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; the other endloop, and return null in response. This resulted in a crash.
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;
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; Check that with the fix we are able to compile this code successfully.
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target triple = "hexagon"
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; Function Attrs: norecurse
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define void @fred() local_unnamed_addr #0 align 2 {
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b0:
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br label %b7
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b1: ; preds = %b9
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br i1 undef, label %b4, label %b2
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b2: ; preds = %b1
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%v3 = sub i32 undef, undef
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br label %b4
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b4: ; preds = %b2, %b1
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%v5 = phi i32 [ undef, %b1 ], [ %v3, %b2 ]
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br i1 undef, label %b14, label %b6
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b6: ; preds = %b4
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br label %b10
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b7: ; preds = %b0
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br i1 undef, label %b9, label %b8
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b8: ; preds = %b7
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unreachable
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b9: ; preds = %b7
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br label %b1
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b10: ; preds = %b21, %b6
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%v11 = phi i32 [ %v22, %b21 ], [ %v5, %b6 ]
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br i1 undef, label %b21, label %b12
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b12: ; preds = %b10
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br label %b15
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b13: ; preds = %b21
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br label %b14
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b14: ; preds = %b13, %b4
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ret void
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b15: ; preds = %b12
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br i1 undef, label %b16, label %b17
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b16: ; preds = %b15
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store i32 0, i32* undef, align 4
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br label %b21
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b17: ; preds = %b15
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br label %b18
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b18: ; preds = %b17
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br i1 undef, label %b19, label %b20
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b19: ; preds = %b18
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br label %b21
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b20: ; preds = %b18
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store i32 0, i32* undef, align 4
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br label %b21
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b21: ; preds = %b20, %b19, %b16, %b10
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%v22 = add i32 %v11, -8
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%v23 = icmp eq i32 %v22, 0
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br i1 %v23, label %b13, label %b10
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}
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attributes #0 = { norecurse "target-cpu"="hexagonv60" "target-features"="-hvx,-hvx-double,-long-calls" }
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