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AMDGPU: Add v_mad 16-bit instructions definition.
Differential Revision: http://reviews.llvm.org/D21362 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@272919 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1447,6 +1447,9 @@ def VOP_F16_F16_F16 : VOPProfile <[f16, f16, f16, untyped]>;
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def VOP_F16_F16_I16 : VOPProfile <[f16, f16, i32, untyped]>;
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def VOP_I16_I16_I16 : VOPProfile <[i32, i32, i32, untyped]>;
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def VOP_I16_I16_I16_I16 : VOPProfile <[i32, i32, i32, i32, untyped]>;
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def VOP_F16_F16_F16_F16 : VOPProfile <[f16, f16, f16, f16, untyped]>;
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def VOP_NONE : VOPProfile <[untyped, untyped, untyped, untyped]>;
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def VOP_F32_F32 : VOPProfile <[f32, f32, untyped, untyped]>;
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@ -75,6 +75,14 @@ defm V_MIN_I16 : VOP2Inst <vop2<0,0x32>, "v_min_i16", VOP_I16_I16_I16>;
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} // End isCommutable = 1
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defm V_LDEXP_F16 : VOP2Inst <vop2<0,0x33>, "v_ldexp_f16", VOP_F16_F16_I16>;
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//===----------------------------------------------------------------------===//
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// VOP3 Instructions
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//===----------------------------------------------------------------------===//
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let isCommutable = 1 in {
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defm V_MAD_F16 : VOP3Inst <vop3<0, 0x1ea>, "v_mad_f16", VOP_F16_F16_F16_F16>;
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defm V_MAD_U16 : VOP3Inst <vop3<0, 0x1eb>, "v_mad_u16", VOP_I16_I16_I16_I16>;
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defm V_MAD_I16 : VOP3Inst <vop3<0, 0x1ec>, "v_mad_i16", VOP_I16_I16_I16_I16>;
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}
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} // let DisableSIDecoder = 1
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// Aliases to simplify matching of floating-point instructions that
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