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Rename M_PREDICATED to M_PREDICABLE; opcode can be specified isPredicable without having a PredicateOperand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37116 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -87,7 +87,7 @@ namespace llvm {
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bool isCall;
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bool isLoad;
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bool isStore;
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bool isPredicated;
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bool isPredicable;
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bool isConvertibleToThreeAddress;
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bool isCommutable;
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bool isTerminator;
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@ -356,7 +356,7 @@ CodeGenInstruction::CodeGenInstruction(Record *R, const std::string &AsmStr)
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isLoad = R->getValueAsBit("isLoad");
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isStore = R->getValueAsBit("isStore");
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bool isTwoAddress = R->getValueAsBit("isTwoAddress");
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isPredicated = false; // set below.
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isPredicable = R->getValueAsBit("isPredicable");
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isConvertibleToThreeAddress = R->getValueAsBit("isConvertibleToThreeAddress");
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isCommutable = R->getValueAsBit("isCommutable");
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isTerminator = R->getValueAsBit("isTerminator");
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@ -404,7 +404,7 @@ CodeGenInstruction::CodeGenInstruction(Record *R, const std::string &AsmStr)
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if (unsigned NumArgs = MIOpInfo->getNumArgs())
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NumOps = NumArgs;
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isPredicated |= Rec->isSubClassOf("PredicateOperand");
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isPredicable |= Rec->isSubClassOf("PredicateOperand");
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} else if (Rec->getName() == "variable_ops") {
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hasVariableNumberOfOperands = true;
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continue;
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@ -236,7 +236,7 @@ void InstrInfoEmitter::emitRecord(const CodeGenInstruction &Inst, unsigned Num,
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if (Inst.isCall) OS << "|M_CALL_FLAG";
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if (Inst.isLoad) OS << "|M_LOAD_FLAG";
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if (Inst.isStore || isStore) OS << "|M_STORE_FLAG";
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if (Inst.isPredicated) OS << "|M_PREDICATED";
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if (Inst.isPredicable) OS << "|M_PREDICABLE";
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if (Inst.isConvertibleToThreeAddress) OS << "|M_CONVERTIBLE_TO_3_ADDR";
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if (Inst.isCommutable) OS << "|M_COMMUTABLE";
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if (Inst.isTerminator) OS << "|M_TERMINATOR_FLAG";
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