mirror of
https://github.com/RPCSX/llvm.git
synced 2024-12-05 02:16:46 +00:00
This field isn't used anymore, use it with HWEncoding instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161564 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
0e80e182a9
commit
529f314050
@ -12,16 +12,16 @@
|
||||
//===----------------------------------------------------------------------===//
|
||||
|
||||
// Registers are identified with 4-bit ID numbers.
|
||||
class ARMReg<bits<4> num, string n, list<Register> subregs = []> : Register<n> {
|
||||
field bits<4> Num;
|
||||
class ARMReg<bits<16> Enc, string n, list<Register> subregs = []> : Register<n> {
|
||||
let HWEncoding = Enc;
|
||||
let Namespace = "ARM";
|
||||
let SubRegs = subregs;
|
||||
// All bits of ARM registers with sub-registers are covered by sub-registers.
|
||||
let CoveredBySubRegs = 1;
|
||||
}
|
||||
|
||||
class ARMFReg<bits<6> num, string n> : Register<n> {
|
||||
field bits<6> Num;
|
||||
class ARMFReg<bits<16> Enc, string n> : Register<n> {
|
||||
let HWEncoding = Enc;
|
||||
let Namespace = "ARM";
|
||||
}
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user