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[msan] Fix vector pack intrinsic handling.
This fixes a crash on MMX intrinsics, as well as a corner case in handling of all unsigned pack intrinsics. PR19953. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210454 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1928,24 +1928,82 @@ struct MemorySanitizerVisitor : public InstVisitor<MemorySanitizerVisitor> {
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setOriginForNaryOp(I);
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}
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// \brief Get an X86_MMX-sized vector type.
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Type *getMMXVectorTy(unsigned EltSizeInBits) {
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const unsigned X86_MMXSizeInBits = 64;
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return VectorType::get(IntegerType::get(*MS.C, EltSizeInBits),
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X86_MMXSizeInBits / EltSizeInBits);
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}
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// \brief Returns a signed counterpart for an (un)signed-saturate-and-pack
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// intrinsic.
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Intrinsic::ID getSignedPackIntrinsic(Intrinsic::ID id) {
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switch (id) {
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case llvm::Intrinsic::x86_sse2_packsswb_128:
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case llvm::Intrinsic::x86_sse2_packuswb_128:
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return llvm::Intrinsic::x86_sse2_packsswb_128;
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case llvm::Intrinsic::x86_sse2_packssdw_128:
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case llvm::Intrinsic::x86_sse41_packusdw:
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return llvm::Intrinsic::x86_sse2_packssdw_128;
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case llvm::Intrinsic::x86_avx2_packsswb:
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case llvm::Intrinsic::x86_avx2_packuswb:
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return llvm::Intrinsic::x86_avx2_packsswb;
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case llvm::Intrinsic::x86_avx2_packssdw:
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case llvm::Intrinsic::x86_avx2_packusdw:
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return llvm::Intrinsic::x86_avx2_packssdw;
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case llvm::Intrinsic::x86_mmx_packsswb:
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case llvm::Intrinsic::x86_mmx_packuswb:
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return llvm::Intrinsic::x86_mmx_packsswb;
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case llvm::Intrinsic::x86_mmx_packssdw:
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return llvm::Intrinsic::x86_mmx_packssdw;
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default:
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llvm_unreachable("unexpected intrinsic id");
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}
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}
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// \brief Instrument vector shift instrinsic.
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//
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// This function instruments intrinsics like x86_mmx_packsswb, that
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// packs elements of 2 input vectors into half as much bits with saturation.
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// Shadow is propagated with the same intrinsic applied to
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// sext(Sa != zeroinitializer), sext(Sb != zeroinitializer).
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void handleVectorPackIntrinsic(IntrinsicInst &I) {
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// Shadow is propagated with the signed variant of the same intrinsic applied
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// to sext(Sa != zeroinitializer), sext(Sb != zeroinitializer).
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// EltSizeInBits is used only for x86mmx arguments.
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void handleVectorPackIntrinsic(IntrinsicInst &I, unsigned EltSizeInBits = 0) {
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assert(I.getNumArgOperands() == 2);
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bool isX86_MMX = I.getOperand(0)->getType()->isX86_MMXTy();
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IRBuilder<> IRB(&I);
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Value *S1 = getShadow(&I, 0);
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Value *S2 = getShadow(&I, 1);
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Type *T = S1->getType();
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assert(isX86_MMX || S1->getType()->isVectorTy());
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// SExt and ICmpNE below must apply to individual elements of input vectors.
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// In case of x86mmx arguments, cast them to appropriate vector types and
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// back.
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Type *T = isX86_MMX ? getMMXVectorTy(EltSizeInBits) : S1->getType();
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if (isX86_MMX) {
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S1 = IRB.CreateBitCast(S1, T);
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S2 = IRB.CreateBitCast(S2, T);
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}
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Value *S1_ext = IRB.CreateSExt(
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IRB.CreateICmpNE(S1, llvm::Constant::getNullValue(T)), T);
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Value *S2_ext = IRB.CreateSExt(
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IRB.CreateICmpNE(S2, llvm::Constant::getNullValue(T)), T);
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Value *S = IRB.CreateCall2(I.getCalledValue(), S1_ext, S2_ext,
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"_msprop_vector_pack");
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if (isX86_MMX) {
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Type *X86_MMXTy = Type::getX86_MMXTy(*MS.C);
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S1_ext = IRB.CreateBitCast(S1_ext, X86_MMXTy);
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S2_ext = IRB.CreateBitCast(S2_ext, X86_MMXTy);
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}
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Function *ShadowFn = Intrinsic::getDeclaration(
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F.getParent(), getSignedPackIntrinsic(I.getIntrinsicID()));
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Value *S = IRB.CreateCall2(ShadowFn, S1_ext, S2_ext, "_msprop_vector_pack");
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if (isX86_MMX) S = IRB.CreateBitCast(S, getShadowTy(&I));
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setShadow(&I, S);
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setOriginForNaryOp(I);
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}
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@ -2074,12 +2132,18 @@ struct MemorySanitizerVisitor : public InstVisitor<MemorySanitizerVisitor> {
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case llvm::Intrinsic::x86_avx2_packssdw:
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case llvm::Intrinsic::x86_avx2_packuswb:
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case llvm::Intrinsic::x86_avx2_packusdw:
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case llvm::Intrinsic::x86_mmx_packsswb:
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case llvm::Intrinsic::x86_mmx_packssdw:
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case llvm::Intrinsic::x86_mmx_packuswb:
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handleVectorPackIntrinsic(I);
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break;
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case llvm::Intrinsic::x86_mmx_packsswb:
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case llvm::Intrinsic::x86_mmx_packuswb:
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handleVectorPackIntrinsic(I, 16);
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break;
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case llvm::Intrinsic::x86_mmx_packssdw:
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handleVectorPackIntrinsic(I, 32);
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break;
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default:
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if (!handleUnknownIntrinsic(I))
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visitInstruction(I);
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@ -5,6 +5,7 @@ target triple = "x86_64-unknown-linux-gnu"
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declare <8 x i16> @llvm.x86.sse2.packssdw.128(<4 x i32>, <4 x i32>) nounwind readnone
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declare <32 x i8> @llvm.x86.avx2.packuswb(<16 x i16> %a, <16 x i16> %b) nounwind readnone
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declare x86_mmx @llvm.x86.mmx.packuswb(x86_mmx, x86_mmx) nounwind readnone
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define <8 x i16> @Test_packssdw_128(<4 x i32> %a, <4 x i32> %b) sanitize_memory {
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entry:
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@ -33,6 +34,27 @@ entry:
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; CHECK-DAG: sext <16 x i1> {{.*}} to <16 x i16>
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; CHECK-DAG: icmp ne <16 x i16> {{.*}}, zeroinitializer
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; CHECK-DAG: sext <16 x i1> {{.*}} to <16 x i16>
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; CHECK-DAG: call <32 x i8> @llvm.x86.avx2.packuswb(
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; CHECK-DAG: call <32 x i8> @llvm.x86.avx2.packsswb(
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; CHECK-DAG: call <32 x i8> @llvm.x86.avx2.packuswb(
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; CHECK: ret <32 x i8>
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define x86_mmx @Test_mmx_packuswb(x86_mmx %a, x86_mmx %b) sanitize_memory {
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entry:
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%c = tail call x86_mmx @llvm.x86.mmx.packuswb(x86_mmx %a, x86_mmx %b) nounwind
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ret x86_mmx %c
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}
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; CHECK-LABEL: @Test_mmx_packuswb(
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; CHECK-DAG: bitcast i64 {{.*}} to <4 x i16>
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; CHECK-DAG: bitcast i64 {{.*}} to <4 x i16>
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; CHECK-DAG: icmp ne <4 x i16> {{.*}}, zeroinitializer
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; CHECK-DAG: sext <4 x i1> {{.*}} to <4 x i16>
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; CHECK-DAG: icmp ne <4 x i16> {{.*}}, zeroinitializer
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; CHECK-DAG: sext <4 x i1> {{.*}} to <4 x i16>
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; CHECK-DAG: bitcast <4 x i16> {{.*}} to x86_mmx
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; CHECK-DAG: bitcast <4 x i16> {{.*}} to x86_mmx
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; CHECK-DAG: call x86_mmx @llvm.x86.mmx.packsswb({{.*}}
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; CHECK-DAG: bitcast x86_mmx {{.*}} to i64
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; CHECK-DAG: call x86_mmx @llvm.x86.mmx.packuswb({{.*}}
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; CHECK: ret x86_mmx
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