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[InstCombine][AVX2] Added VPERMD/VPERMPS shuffle combining placeholder tests.
For future support for VPERMD/VPERMPS to generic shuffles combines git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268166 91177308-0d34-0410-b5e6-96231b3b80d8
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test/Transforms/InstCombine/x86-avx2.ll
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test/Transforms/InstCombine/x86-avx2.ll
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instcombine -S | FileCheck %s
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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; FIXME: Verify that instcombine is able to fold identity shuffles.
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define <8 x i32> @identity_test_vpermd(<8 x i32> %a0) {
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; CHECK-LABEL: @identity_test_vpermd(
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; CHECK-NEXT: [[A:%.*]] = tail call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> [[A:%.*]]0, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>)
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; CHECK-NEXT: ret <8 x i32> [[A]]
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;
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%a = tail call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> %a0, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>)
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ret <8 x i32> %a
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}
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define <8 x float> @identity_test_vpermps(<8 x float> %a0) {
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; CHECK-LABEL: @identity_test_vpermps(
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; CHECK-NEXT: [[A:%.*]] = tail call <8 x float> @llvm.x86.avx2.permps(<8 x float> [[A:%.*]]0, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>)
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; CHECK-NEXT: ret <8 x float> [[A]]
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;
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%a = tail call <8 x float> @llvm.x86.avx2.permps(<8 x float> %a0, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>)
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ret <8 x float> %a
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}
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; FIXME: Instcombine should be able to fold the following shuffle to a builtin shufflevector
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; with a shuffle mask of all zeroes.
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define <8 x i32> @zero_test_vpermd(<8 x i32> %a0) {
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; CHECK-LABEL: @zero_test_vpermd(
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; CHECK-NEXT: [[A:%.*]] = tail call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> [[A:%.*]]0, <8 x i32> zeroinitializer)
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; CHECK-NEXT: ret <8 x i32> [[A]]
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;
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%a = tail call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> %a0, <8 x i32> zeroinitializer)
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ret <8 x i32> %a
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}
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define <8 x float> @zero_test_vpermps(<8 x float> %a0) {
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; CHECK-LABEL: @zero_test_vpermps(
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; CHECK-NEXT: [[A:%.*]] = tail call <8 x float> @llvm.x86.avx2.permps(<8 x float> [[A:%.*]]0, <8 x i32> zeroinitializer)
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; CHECK-NEXT: ret <8 x float> [[A]]
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;
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%a = tail call <8 x float> @llvm.x86.avx2.permps(<8 x float> %a0, <8 x i32> zeroinitializer)
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ret <8 x float> %a
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}
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; FIXME: Verify that instcombine is able to fold constant shuffles.
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define <8 x i32> @shuffle_test_vpermd(<8 x i32> %a0) {
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; CHECK-LABEL: @shuffle_test_vpermd(
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; CHECK-NEXT: [[A:%.*]] = tail call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> [[A:%.*]]0, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>)
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; CHECK-NEXT: ret <8 x i32> [[A]]
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;
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%a = tail call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> %a0, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>)
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ret <8 x i32> %a
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}
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define <8 x float> @shuffle_test_vpermps(<8 x float> %a0) {
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; CHECK-LABEL: @shuffle_test_vpermps(
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; CHECK-NEXT: [[A:%.*]] = tail call <8 x float> @llvm.x86.avx2.permps(<8 x float> [[A:%.*]]0, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>)
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; CHECK-NEXT: ret <8 x float> [[A]]
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;
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%a = tail call <8 x float> @llvm.x86.avx2.permps(<8 x float> %a0, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>)
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ret <8 x float> %a
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}
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; FIXME: Verify that instcombine is able to fold constant shuffles with undef mask elements.
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define <8 x i32> @undef_test_vpermd(<8 x i32> %a0) {
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; CHECK-LABEL: @undef_test_vpermd(
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; CHECK-NEXT: [[A:%.*]] = tail call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> [[A:%.*]]0, <8 x i32> <i32 undef, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>)
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; CHECK-NEXT: ret <8 x i32> [[A]]
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;
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%a = tail call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> %a0, <8 x i32> <i32 undef, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>)
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ret <8 x i32> %a
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}
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define <8 x float> @undef_test_vpermps(<8 x float> %a0) {
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; CHECK-LABEL: @undef_test_vpermps(
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; CHECK-NEXT: [[A:%.*]] = tail call <8 x float> @llvm.x86.avx2.permps(<8 x float> [[A:%.*]]0, <8 x i32> <i32 undef, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>)
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; CHECK-NEXT: ret <8 x float> [[A]]
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;
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%a = tail call <8 x float> @llvm.x86.avx2.permps(<8 x float> %a0, <8 x i32> <i32 undef, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>)
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ret <8 x float> %a
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}
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declare <8 x i32> @llvm.x86.avx2.permd(<8 x i32>, <8 x i32>)
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declare <8 x float> @llvm.x86.avx2.permps(<8 x float>, <8 x i32>)
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