mirror of
https://github.com/RPCSX/llvm.git
synced 2025-04-02 16:21:36 +00:00
Add MCRI::getNumSubRegIndices() and start checking SubRegIndex ranges.
Apparently, NumSubRegIndices was completely unused before. Adjust it by one to include the null subreg index, just like getNumRegs() includes the null register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163628 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
ef68cfa8b8
commit
59f45e4610
@ -333,6 +333,13 @@ public:
|
||||
return NumRegs;
|
||||
}
|
||||
|
||||
/// getNumSubRegIndices - Return the number of sub-register indices
|
||||
/// understood by the target. Index 0 is reserved for the no-op sub-register,
|
||||
/// while 1 to getNumSubRegIndices() - 1 represent real sub-registers.
|
||||
unsigned getNumSubRegIndices() const {
|
||||
return NumSubRegIndices;
|
||||
}
|
||||
|
||||
/// getNumRegUnits - Return the number of (native) register units in the
|
||||
/// target. Register units are numbered from 0 to getNumRegUnits() - 1. They
|
||||
/// can be accessed through MCRegUnitIterator defined below.
|
||||
|
@ -327,7 +327,8 @@ public:
|
||||
/// getSubRegIndexName - Return the human-readable symbolic target-specific
|
||||
/// name for the specified SubRegIndex.
|
||||
const char *getSubRegIndexName(unsigned SubIdx) const {
|
||||
assert(SubIdx && "This is not a subregister index");
|
||||
assert(SubIdx && SubIdx < getNumSubRegIndices() &&
|
||||
"This is not a subregister index");
|
||||
return SubRegIndexNames[SubIdx-1];
|
||||
}
|
||||
|
||||
|
@ -24,6 +24,8 @@ unsigned MCRegisterInfo::getMatchingSuperReg(unsigned Reg, unsigned SubIdx,
|
||||
}
|
||||
|
||||
unsigned MCRegisterInfo::getSubReg(unsigned Reg, unsigned Idx) const {
|
||||
assert(Idx && Idx < getNumSubRegIndices() &&
|
||||
"This is not a subregister index");
|
||||
// Get a pointer to the corresponding SubRegIndices list. This list has the
|
||||
// name of each sub-register in the same order as MCSubRegIterator.
|
||||
const uint16_t *SRI = SubRegIndices + get(Reg).SubRegIndices;
|
||||
@ -34,6 +36,7 @@ unsigned MCRegisterInfo::getSubReg(unsigned Reg, unsigned Idx) const {
|
||||
}
|
||||
|
||||
unsigned MCRegisterInfo::getSubRegIndex(unsigned Reg, unsigned SubReg) const {
|
||||
assert(SubReg && SubReg < getNumRegs() && "This is not a register");
|
||||
// Get a pointer to the corresponding SubRegIndices list. This list has the
|
||||
// name of each sub-register in the same order as MCSubRegIterator.
|
||||
const uint16_t *SRI = SubRegIndices + get(Reg).SubRegIndices;
|
||||
|
@ -770,7 +770,7 @@ RegisterInfoEmitter::runMCDesc(raw_ostream &OS, CodeGenTarget &Target,
|
||||
<< TargetName << "RegDiffLists, "
|
||||
<< TargetName << "RegStrings, "
|
||||
<< TargetName << "SubRegIdxLists, "
|
||||
<< SubRegIndices.size() << ",\n"
|
||||
<< (SubRegIndices.size() + 1) << ",\n"
|
||||
<< " " << TargetName << "RegEncodingTable);\n\n";
|
||||
|
||||
EmitRegMapping(OS, Regs, false);
|
||||
@ -1131,7 +1131,7 @@ RegisterInfoEmitter::runTargetDesc(raw_ostream &OS, CodeGenTarget &Target,
|
||||
<< " " << TargetName << "RegDiffLists,\n"
|
||||
<< " " << TargetName << "RegStrings,\n"
|
||||
<< " " << TargetName << "SubRegIdxLists,\n"
|
||||
<< " " << SubRegIndices.size() << ",\n"
|
||||
<< " " << SubRegIndices.size() + 1 << ",\n"
|
||||
<< " " << TargetName << "RegEncodingTable);\n\n";
|
||||
|
||||
EmitRegMapping(OS, Regs, true);
|
||||
|
Loading…
x
Reference in New Issue
Block a user