RPCSX/llvm
1
0
Fork 0
mirror of https://github.com/RPCSX/llvm.git synced 2024-12-15 16:09:02 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

Move -lowerselect later in the chain; some select instructions were

Browse Source 
slipping through into the instruction selector, which can't deal with
them yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18758 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Brian Gaeke 2004-12-10 08:39:30 +00:00
parent c2e5f3635a
commit 5aefa8a6fe
2 changed files with 12 additions and 12 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
lib/Target/Sparc/SparcTargetMachine.cpp
View File

@ -65,9 +65,6 @@ bool SparcV8TargetMachine::addPassesToEmitAssembly(PassManager &PM,
// Replace malloc and free instructions with library calls.
PM.add(createLowerAllocationsPass());
// FIXME: implement the select instruction in the instruction selector.
PM.add(createLowerSelectPass());
// FIXME: implement the switch instruction in the instruction selector.
PM.add(createLowerSwitchPass());
@ -79,6 +76,9 @@ bool SparcV8TargetMachine::addPassesToEmitAssembly(PassManager &PM,
// Make sure that no unreachable blocks are instruction selected.
PM.add(createUnreachableBlockEliminationPass());
// FIXME: implement the select instruction in the instruction selector.
PM.add(createLowerSelectPass());
PM.add(createSparcV8SimpleInstructionSelector(*this));
// Print machine instructions as they were initially generated.
@ -118,9 +118,6 @@ void SparcV8JITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
// Replace malloc and free instructions with library calls.
PM.add(createLowerAllocationsPass());
// FIXME: implement the select instruction in the instruction selector.
PM.add(createLowerSelectPass());
// FIXME: implement the switch instruction in the instruction selector.
PM.add(createLowerSwitchPass());
@ -132,6 +129,9 @@ void SparcV8JITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
// Make sure that no unreachable blocks are instruction selected.
PM.add(createUnreachableBlockEliminationPass());
// FIXME: implement the select instruction in the instruction selector.
PM.add(createLowerSelectPass());
PM.add(createSparcV8SimpleInstructionSelector(TM));
// Print machine instructions as they were initially generated.

12
lib/Target/SparcV8/SparcV8TargetMachine.cpp
View File

@ -65,9 +65,6 @@ bool SparcV8TargetMachine::addPassesToEmitAssembly(PassManager &PM,
// Replace malloc and free instructions with library calls.
PM.add(createLowerAllocationsPass());
// FIXME: implement the select instruction in the instruction selector.
PM.add(createLowerSelectPass());
// FIXME: implement the switch instruction in the instruction selector.
PM.add(createLowerSwitchPass());
@ -79,6 +76,9 @@ bool SparcV8TargetMachine::addPassesToEmitAssembly(PassManager &PM,
// Make sure that no unreachable blocks are instruction selected.
PM.add(createUnreachableBlockEliminationPass());
// FIXME: implement the select instruction in the instruction selector.
PM.add(createLowerSelectPass());
PM.add(createSparcV8SimpleInstructionSelector(*this));
// Print machine instructions as they were initially generated.
@ -118,9 +118,6 @@ void SparcV8JITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
// Replace malloc and free instructions with library calls.
PM.add(createLowerAllocationsPass());
// FIXME: implement the select instruction in the instruction selector.
PM.add(createLowerSelectPass());
// FIXME: implement the switch instruction in the instruction selector.
PM.add(createLowerSwitchPass());
@ -132,6 +129,9 @@ void SparcV8JITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
// Make sure that no unreachable blocks are instruction selected.
PM.add(createUnreachableBlockEliminationPass());
// FIXME: implement the select instruction in the instruction selector.
PM.add(createLowerSelectPass());
PM.add(createSparcV8SimpleInstructionSelector(TM));
// Print machine instructions as they were initially generated.