From 5f67d946972c69338b46cf67bc3c02692256aabe Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Tue, 21 Aug 2012 07:11:11 +0000 Subject: [PATCH] Cleanup the scalar FMA3 definitions. Add patterns to fold loads with scalar forms. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162260 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86InstrFMA.td | 93 ++++++++++++++++++----------------- 1 file changed, 49 insertions(+), 44 deletions(-) diff --git a/lib/Target/X86/X86InstrFMA.td b/lib/Target/X86/X86InstrFMA.td index cdabc410a22..95ee7e50ba1 100644 --- a/lib/Target/X86/X86InstrFMA.td +++ b/lib/Target/X86/X86InstrFMA.td @@ -245,23 +245,27 @@ let Predicates = [HasFMA] in { let Constraints = "$src1 = $dst" in { multiclass fma3s_rm opc, string OpcodeStr, X86MemOperand x86memop, - RegisterClass RC> { -let neverHasSideEffects = 1 in { - def r : FMA3; - let mayLoad = 1 in - def m : FMA3; -} // neverHasSideEffects = 1 + RegisterClass RC, ValueType OpVT, PatFrag mem_frag, + SDPatternOperator OpNode = null_frag, bit MayLoad = 1> { + def r : FMA3; + let mayLoad = MayLoad in + def m : FMA3; } multiclass fma3s_rm_int opc, string OpcodeStr, Operand memop, ComplexPattern mem_cpat, Intrinsic IntId, - RegisterClass RC, SDNode OpNode, ValueType OpVT> { + RegisterClass RC> { def r_Int : FMA3 opc, string OpcodeStr, Operand memop, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"), [(set VR128:$dst, (IntId VR128:$src2, VR128:$src1, mem_cpat:$src3))]>; - def r : FMA3; - let mayLoad = 1 in - def m : FMA3; } } // Constraints = "$src1 = $dst" multiclass fma3s_forms opc132, bits<8> opc213, bits<8> opc231, - string OpStr, Intrinsic IntF32, Intrinsic IntF64, - SDNode OpNode> { - defm SSr132 : fma3s_rm; - defm SSr231 : fma3s_rm; - defm SDr132 : fma3s_rm, - VEX_W; - defm SDr231 : fma3s_rm, - VEX_W; - defm SSr213 : fma3s_rm_int ; - defm SDr213 : fma3s_rm_int , VEX_W; + string OpStr, string PackTy, Intrinsic Int, + SDNode OpNode, RegisterClass RC, ValueType OpVT, + X86MemOperand x86memop, Operand memop, PatFrag mem_frag, + ComplexPattern mem_cpat> { +let neverHasSideEffects = 1 in { + defm r132 : fma3s_rm; + defm r231 : fma3s_rm; } -defm VFMADD : fma3s_forms<0x99, 0xA9, 0xB9, "vfmadd", int_x86_fma_vfmadd_ss, - int_x86_fma_vfmadd_sd, X86Fmadd>, VEX_LIG; -defm VFMSUB : fma3s_forms<0x9B, 0xAB, 0xBB, "vfmsub", int_x86_fma_vfmsub_ss, - int_x86_fma_vfmsub_sd, X86Fmsub>, VEX_LIG; +defm r213 : fma3s_rm, + fma3s_rm_int; +} -defm VFNMADD : fma3s_forms<0x9D, 0xAD, 0xBD, "vfnmadd", int_x86_fma_vfnmadd_ss, - int_x86_fma_vfnmadd_sd, X86Fnmadd>, VEX_LIG; -defm VFNMSUB : fma3s_forms<0x9F, 0xAF, 0xBF, "vfnmsub", int_x86_fma_vfnmsub_ss, - int_x86_fma_vfnmsub_sd, X86Fnmsub>, VEX_LIG; +multiclass fma3s opc132, bits<8> opc213, bits<8> opc231, + string OpStr, Intrinsic IntF32, Intrinsic IntF64, + SDNode OpNode> { + defm SS : fma3s_forms; + defm SD : fma3s_forms, VEX_W; +} + +defm VFMADD : fma3s<0x99, 0xA9, 0xB9, "vfmadd", int_x86_fma_vfmadd_ss, + int_x86_fma_vfmadd_sd, X86Fmadd>, VEX_LIG; +defm VFMSUB : fma3s<0x9B, 0xAB, 0xBB, "vfmsub", int_x86_fma_vfmsub_ss, + int_x86_fma_vfmsub_sd, X86Fmsub>, VEX_LIG; + +defm VFNMADD : fma3s<0x9D, 0xAD, 0xBD, "vfnmadd", int_x86_fma_vfnmadd_ss, + int_x86_fma_vfnmadd_sd, X86Fnmadd>, VEX_LIG; +defm VFNMSUB : fma3s<0x9F, 0xAF, 0xBF, "vfnmsub", int_x86_fma_vfnmsub_ss, + int_x86_fma_vfnmsub_sd, X86Fnmsub>, VEX_LIG; //===----------------------------------------------------------------------===//