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[ImplicitNullChecks] Uphold an invariant in areMemoryOpsAliased
Right now areMemoryOpsAliased has an assertion justified as: MMO1 should have a value due it comes from operation we'd like to use as implicit null check. assert(MMO1->getValue() && "MMO1 should have a Value!"); However, it is possible for that invariant to not be upheld in the following situation (conceptually): Null check %RAX NotNullSucc: %RAX = LEA %RSP, 16 // I0 %RDX = MOV64rm %RAX // I1 With the current code, we will have an early exit from ImplicitNullChecks::isSuitableMemoryOp on I0 with SR_Unsuitable. However, I1 will look plausible (since it loads from %RAX) and will go ahead and call areMemoryOpsAliased(I1, I0). This will cause us to fail the assert mentioned above since I1 does not load from an IR level value and thus is allowed to have a non-Value base address. The fix is to bail out earlier whenever we see an unsuitable instruction overwrite PointerReg. This would guarantee that when we call areMemoryOpsAliased, we're guaranteed to be looking at an instruction that loads from or stores to an IR level value. Original Patch Author: sanjoy Reviewers: sanjoy, mkazantsev, reames Reviewed By: sanjoy Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D34385 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305879 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Serguei Katkov
parent
84fac2c58c
commit
608be862ff
@ -359,30 +359,15 @@ ImplicitNullChecks::isSuitableMemoryOp(MachineInstr &MI, unsigned PointerReg,
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Offset < PageSize))
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return SR_Unsuitable;
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// Finally, we need to make sure that the access instruction actually is
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// accessing from PointerReg, and there isn't some re-definition of PointerReg
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// between the compare and the memory access.
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// If PointerReg has been redefined before then there is no sense to continue
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// lookup due to this condition will fail for any further instruction.
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SuitabilityResult Suitable = SR_Suitable;
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for (auto *PrevMI : PrevInsts)
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for (auto &PrevMO : PrevMI->operands()) {
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if (PrevMO.isReg() && PrevMO.getReg() && PrevMO.isDef() &&
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TRI->regsOverlap(PrevMO.getReg(), PointerReg))
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return SR_Impossible;
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// Check whether the current memory access aliases with previous one.
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// If we already found that it aliases then no need to continue.
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// But we continue base pointer check as it can result in SR_Impossible.
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if (Suitable == SR_Suitable) {
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AliasResult AR = areMemoryOpsAliased(MI, PrevMI);
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if (AR == AR_WillAliasEverything)
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return SR_Impossible;
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if (AR == AR_MayAlias)
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Suitable = SR_Unsuitable;
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}
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}
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return Suitable;
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// Finally, check whether the current memory access aliases with previous one.
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for (auto *PrevMI : PrevInsts) {
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AliasResult AR = areMemoryOpsAliased(MI, PrevMI);
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if (AR == AR_WillAliasEverything)
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return SR_Impossible;
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if (AR == AR_MayAlias)
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return SR_Unsuitable;
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}
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return SR_Suitable;
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}
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bool ImplicitNullChecks::canHoistInst(MachineInstr *FaultingMI,
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@ -569,6 +554,12 @@ bool ImplicitNullChecks::analyzeBlockForNullChecks(
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return true;
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}
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// If MI re-defines the PointerReg then we cannot move further.
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if (any_of(MI.operands(), [&](MachineOperand &MO) {
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return MO.isReg() && MO.getReg() && MO.isDef() &&
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TRI->regsOverlap(MO.getReg(), PointerReg);
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}))
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return false;
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InstsSeenSoFar.push_back(&MI);
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}
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293
test/CodeGen/X86/non-value-mem-operand.mir
Normal file
293
test/CodeGen/X86/non-value-mem-operand.mir
Normal file
@ -0,0 +1,293 @@
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# RUN: llc -run-pass implicit-null-checks -mtriple=x86_64-apple-macosx -o - %s | FileCheck %s
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# CHECK-NOT: FAULTING_OP
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--- |
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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@global = external global i8*
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@global.1 = external global i8*
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declare i8* @ham(i8*, i8**)
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define void @eggs(i8* %arg) gc "statepoint-example" {
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bb:
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%tmp = call i8* undef(i8* undef, i8** undef)
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%tmp1 = icmp eq i8* %tmp, null
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br i1 %tmp1, label %bb2, label %bb3, !make.implicit !0
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bb2: ; preds = %bb
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br i1 undef, label %bb51, label %bb59
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bb3: ; preds = %bb
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%tmp4 = getelementptr inbounds i8, i8* %tmp, i64 16
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%tmp5 = bitcast i8* %tmp4 to i64*
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br label %bb7
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bb7: ; preds = %bb37, %bb3
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%tmp8 = phi i64* [ %tmp5, %bb3 ], [ %tmp18, %bb37 ]
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%tmp10 = phi i32 [ undef, %bb3 ], [ %tmp48, %bb37 ]
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%tmp12 = phi i32 [ 0, %bb3 ], [ 6, %bb37 ]
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%tmp13 = phi double [ 0.000000e+00, %bb3 ], [ 2.000000e+00, %bb37 ]
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%tmp14 = zext i32 %tmp10 to i64
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br i1 undef, label %bb26, label %bb15
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bb15: ; preds = %bb7
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%tmp16 = call token (i64, i32, void ()*, i32, i32, ...) @llvm.experimental.gc.statepoint.p0f_isVoidf(i64 2882400000, i32 0, void ()* nonnull @wibble, i32 0, i32 0, i32 0, i32 30, i32 1, i32 0, i32 99, i32 0, i32 12, i32 0, i32 10, i32 %tmp10, i32 10, i32 0, i32 10, i32 %tmp12, i32 10, i32 undef, i32 6, float undef, i32 7, double %tmp13, i32 99, i8* null, i32 7, double undef, i32 99, i8* null, i32 13, i8* %tmp, i32 7, double undef, i32 99, i8* null, i8* undef)
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br label %bb26
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bb26: ; preds = %bb15, %bb7
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%tmp18 = phi i64* [ %tmp8, %bb7 ], [ undef, %bb15 ]
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%tmp20 = sub i32 0, 0
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%tmp21 = select i1 undef, i32 0, i32 %tmp20
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%tmp22 = sext i32 %tmp21 to i64
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%tmp23 = load i8*, i8** @global.1, align 8
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%tmp24 = icmp eq i8* %tmp23, null
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%tmp25 = select i1 %tmp24, i8* null, i8* undef
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%tmp27 = load i32, i32* undef, align 4
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%sunkaddr = mul i64 %tmp14, 8
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%tmp2 = bitcast i64* %tmp18 to i8*
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%sunkaddr1 = getelementptr i8, i8* %tmp2, i64 %sunkaddr
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%tmp3 = bitcast i8* %sunkaddr1 to i64*
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%tmp28 = load i64, i64* %tmp3, align 8
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%tmp29 = add i64 %tmp28, 1
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store i64 %tmp29, i64* %tmp3, align 8
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%tmp30 = trunc i64 %tmp28 to i32
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%tmp31 = sub i32 %tmp27, %tmp30
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store i32 %tmp31, i32* undef, align 4
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%tmp32 = getelementptr inbounds i8, i8* %tmp25, i64 768
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%tmp33 = bitcast i8* %tmp32 to i64*
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%tmp34 = load i64, i64* %tmp33, align 8
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br i1 undef, label %bb37, label %bb35
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bb35: ; preds = %bb26
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%tmp36 = call i8* @ham(i8* undef, i8** nonnull @global)
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br label %bb37
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bb37: ; preds = %bb35, %bb26
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%tmp38 = phi i8* [ %tmp36, %bb35 ], [ undef, %bb26 ]
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%tmp39 = getelementptr inbounds i8, i8* %tmp38, i64 760
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%tmp40 = bitcast i8* %tmp39 to i64*
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%tmp41 = load i64, i64* %tmp40, align 8
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%tmp42 = icmp slt i64 %tmp34, %tmp41
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%tmp43 = select i1 %tmp42, i64 %tmp41, i64 %tmp34
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%tmp44 = and i64 %tmp43, 63
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%tmp45 = ashr i64 %tmp29, %tmp44
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%sunkaddr2 = mul i64 %tmp14, 8
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%tmp6 = bitcast i64* %tmp18 to i8*
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%sunkaddr3 = getelementptr i8, i8* %tmp6, i64 %sunkaddr2
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%tmp7 = bitcast i8* %sunkaddr3 to i64*
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store i64 %tmp45, i64* %tmp7, align 8
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%tmp46 = sub i64 0, %tmp22
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store i64 %tmp46, i64* undef, align 8
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%tmp47 = add nsw i32 %tmp12, 1
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%tmp48 = add i32 %tmp10, 1
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%tmp49 = icmp sgt i32 %tmp48, 15140
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br i1 %tmp49, label %bb51.loopexit, label %bb7
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bb51.loopexit: ; preds = %bb37
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%tmp9 = add i32 %tmp10, 1
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br label %bb51
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bb51: ; preds = %bb51.loopexit, %bb2
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%tmp52 = phi i32 [ %tmp47, %bb51.loopexit ], [ 0, %bb2 ]
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%tmp53 = phi double [ 2.000000e+00, %bb51.loopexit ], [ 0.000000e+00, %bb2 ]
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%tmp54 = phi i32 [ %tmp9, %bb51.loopexit ], [ undef, %bb2 ]
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%tmp56 = add i32 %tmp54, 0
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%tmp57 = call token (i64, i32, void (i32)*, i32, i32, ...) @llvm.experimental.gc.statepoint.p0f_isVoidi32f(i64 2882400000, i32 0, void (i32)* nonnull @wobble, i32 1, i32 0, i32 -121, i32 0, i32 38, i32 1, i32 0, i32 270, i32 4, i32 12, i32 0, i32 11, i64 undef, i32 99, i8* null, i32 10, i32 %tmp56, i32 6, float undef, i32 99, i8* null, i32 99, i8* null, i32 10, i32 %tmp52, i32 10, i32 undef, i32 99, i8* null, i32 7, double %tmp53, i32 99, i8* null, i32 7, double undef, i32 99, i8* null, i32 13, i8* undef, i32 99, i8* null, i32 99, i8* null, i8* undef)
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unreachable
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bb59: ; preds = %bb2
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%tmp61 = call token (i64, i32, void (i32)*, i32, i32, ...) @llvm.experimental.gc.statepoint.p0f_isVoidi32f(i64 2882400000, i32 0, void (i32)* nonnull @wobble, i32 1, i32 0, i32 8, i32 0, i32 38, i32 1, i32 0, i32 123, i32 4, i32 12, i32 0, i32 13, i8* null, i32 99, i32 undef, i32 13, i8* null, i32 10, i32 undef, i32 99, i32 undef, i32 99, i32 undef, i32 99, i32 undef, i32 99, i8* null, i32 99, float undef, i32 99, double undef, i32 99, i8* null, i32 99, double undef, i32 99, i8* null, i32 13, i8* null, i32 99, double undef, i32 99, i8* null)
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unreachable
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}
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declare void @wibble()
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declare void @wobble(i32)
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declare token @llvm.experimental.gc.statepoint.p0f_isVoidi32f(i64, i32, void (i32)*, i32, i32, ...)
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declare token @llvm.experimental.gc.statepoint.p0f_isVoidf(i64, i32, void ()*, i32, i32, ...)
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; Function Attrs: nounwind
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declare void @llvm.stackprotector(i8*, i8**) #0
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attributes #0 = { nounwind }
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!0 = !{}
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...
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---
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name: eggs
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alignment: 4
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tracksRegLiveness: true
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fixedStack:
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- { id: 0, type: spill-slot, offset: -56, size: 8, alignment: 8, callee-saved-register: '%rbx' }
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- { id: 1, type: spill-slot, offset: -48, size: 8, alignment: 16, callee-saved-register: '%r12' }
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- { id: 2, type: spill-slot, offset: -40, size: 8, alignment: 8, callee-saved-register: '%r13' }
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- { id: 3, type: spill-slot, offset: -32, size: 8, alignment: 16, callee-saved-register: '%r14' }
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- { id: 4, type: spill-slot, offset: -24, size: 8, alignment: 8, callee-saved-register: '%r15' }
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- { id: 5, type: spill-slot, offset: -16, size: 8, alignment: 16, callee-saved-register: '%rbp' }
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stack:
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- { id: 0, offset: -88, size: 8, alignment: 8 }
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- { id: 1, offset: -96, size: 8, alignment: 8 }
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- { id: 2, offset: -104, size: 8, alignment: 8 }
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- { id: 3, offset: -64, size: 8, alignment: 8 }
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- { id: 4, type: spill-slot, offset: -72, size: 8, alignment: 8 }
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- { id: 5, type: spill-slot, offset: -80, size: 8, alignment: 8 }
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constants:
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- id: 0
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value: 'double 2.000000e+00'
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alignment: 8
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body: |
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bb.0.bb:
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successors: %bb.1.bb2(0x00000800), %bb.3.bb3(0x7ffff800)
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liveins: %rbp, %r15, %r14, %r13, %r12, %rbx
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frame-setup PUSH64r killed %rbp, implicit-def %rsp, implicit %rsp
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frame-setup PUSH64r killed %r15, implicit-def %rsp, implicit %rsp
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frame-setup PUSH64r killed %r14, implicit-def %rsp, implicit %rsp
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frame-setup PUSH64r killed %r13, implicit-def %rsp, implicit %rsp
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frame-setup PUSH64r killed %r12, implicit-def %rsp, implicit %rsp
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frame-setup PUSH64r killed %rbx, implicit-def %rsp, implicit %rsp
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%rsp = frame-setup SUB64ri8 %rsp, 56, implicit-def dead %eflags
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CALL64r undef %rax, csr_64, implicit %rsp, implicit undef %rdi, implicit undef %rsi, implicit-def %rsp, implicit-def %rax
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TEST64rr %rax, %rax, implicit-def %eflags
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JNE_1 %bb.3.bb3, implicit killed %eflags
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bb.1.bb2:
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successors: %bb.2(0x40000000), %bb.13.bb59(0x40000000)
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%ebp = XOR32rr undef %ebp, undef %ebp, implicit-def dead %eflags
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TEST8rr %bpl, %bpl, implicit-def %eflags
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JE_1 %bb.13.bb59, implicit killed %eflags
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bb.2:
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successors: %bb.12.bb51(0x80000000)
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liveins: %ebp
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%xmm0 = XORPSrr undef %xmm0, undef %xmm0
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%ebx = IMPLICIT_DEF implicit-def %rbx
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JMP_1 %bb.12.bb51
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bb.3.bb3:
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successors: %bb.4.bb7(0x80000000)
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liveins: %rax
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MOV64mr %rsp, 1, _, 32, _, %rax :: (store 8 into %stack.5)
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%r12 = MOV64rr killed %rax
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%r12 = ADD64ri8 killed %r12, 16, implicit-def dead %eflags
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%xmm0 = XORPSrr undef %xmm0, undef %xmm0
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%esi = XOR32rr undef %esi, undef %esi, implicit-def dead %eflags
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%rax = MOV64ri %const.0
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%xmm1 = MOVSDrm killed %rax, 1, _, 0, _ :: (load 8 from constant-pool)
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MOVSDmr %rsp, 1, _, 40, _, killed %xmm1 :: (store 8 into %stack.4)
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%eax = IMPLICIT_DEF
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%ecx = XOR32rr undef %ecx, undef %ecx, implicit-def dead %eflags
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bb.4.bb7:
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successors: %bb.6.bb26(0x40000000), %bb.5.bb15(0x40000000)
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liveins: %eax, %ecx, %esi, %r12, %xmm0
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%ebp = MOV32rr killed %ecx
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%ebx = MOV32rr killed %eax, implicit-def %rbx
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%r14d = MOV32rr %ebx, implicit-def %r14
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TEST8rr %sil, %sil, implicit-def %eflags
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JNE_1 %bb.6.bb26, implicit %eflags
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bb.5.bb15:
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successors: %bb.6.bb26(0x80000000)
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liveins: %ebp, %rbx, %r14, %xmm0
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MOV32mr %rsp, 1, _, 24, _, %ebx :: (store 4 into %stack.0, align 8)
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MOV32mr %rsp, 1, _, 16, _, %ebp :: (store 4 into %stack.1, align 8)
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MOVSDmr %rsp, 1, _, 8, _, killed %xmm0 :: (store 8 into %stack.2)
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%rax = MOV64rm %rsp, 1, _, 32, _ :: (load 8 from %stack.5)
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MOV64mr %rsp, 1, _, 48, _, killed %rax :: (store 8 into %stack.3)
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%rax = MOV64ri @wibble
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STATEPOINT 2882400000, 0, 0, killed %rax, 2, 0, 2, 0, 2, 30, 2, 1, 2, 0, 2, 99, 2, 0, 2, 12, 2, 0, 2, 10, 1, 8, %rsp, 24, 2, 10, 2, 0, 2, 10, 1, 8, %rsp, 16, 2, 10, 2, 4278124286, 2, 6, 2, 4278124286, 2, 7, 1, 8, %rsp, 8, 2, 99, 2, 0, 2, 7, 2, 4278124286, 2, 99, 2, 0, 2, 13, 1, 8, %rsp, 48, 2, 7, 2, 4278124286, 2, 99, 2, 0, csr_64, implicit-def %rsp :: (volatile load 8 from %stack.0), (volatile load 8 from %stack.1), (volatile load 8 from %stack.2), (volatile load 8 from %stack.3)
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%esi = XOR32rr undef %esi, undef %esi, implicit-def dead %eflags
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%r12 = IMPLICIT_DEF
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bb.6.bb26:
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successors: %bb.8.bb37(0x40000000), %bb.7.bb35(0x40000000)
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liveins: %ebp, %esi, %rbx, %r12, %r14
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%rax = MOV64ri @global.1
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%rax = MOV64rm killed %rax, 1, _, 0, _ :: (dereferenceable load 8 from @global.1)
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TEST64rr %rax, %rax, implicit-def %eflags
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%rax = CMOVE64rr undef %rax, killed %rax, implicit killed %eflags
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%ecx = MOV32rm undef %rax, 1, _, 0, _ :: (load 4 from `i32* undef`)
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%rdx = MOV64rm %r12, 8, %r14, 0, _ :: (load 8 from %ir.tmp3)
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%r15 = LEA64r %rdx, 1, _, 1, _
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MOV64mr %r12, 8, %r14, 0, _, %r15 :: (store 8 into %ir.tmp3)
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%ecx = SUB32rr killed %ecx, %edx, implicit-def dead %eflags, implicit killed %rdx
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MOV32mr undef %rax, 1, _, 0, _, killed %ecx :: (store 4 into `i32* undef`)
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%r13 = MOV64rm killed %rax, 1, _, 768, _ :: (load 8 from %ir.tmp33)
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TEST8rr %sil, %sil, implicit-def %eflags
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%rax = IMPLICIT_DEF
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JNE_1 %bb.8.bb37, implicit %eflags
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bb.7.bb35:
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successors: %bb.8.bb37(0x80000000)
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liveins: %ebp, %rbx, %r12, %r13, %r14, %r15
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%rsi = MOV64ri @global
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%rax = MOV64ri @ham
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CALL64r killed %rax, csr_64, implicit %rsp, implicit undef %rdi, implicit %rsi, implicit-def %rsp, implicit-def %rax
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%esi = XOR32rr undef %esi, undef %esi, implicit-def dead %eflags
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bb.8.bb37:
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successors: %bb.9.bb37(0x40000000), %bb.10.bb37(0x40000000)
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liveins: %ebp, %esi, %rax, %rbx, %r12, %r13, %r14, %r15
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%rcx = MOV64rm killed %rax, 1, _, 760, _ :: (load 8 from %ir.tmp40)
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CMP64rr %r13, %rcx, implicit-def %eflags
|
||||
JL_1 %bb.10.bb37, implicit %eflags
|
||||
|
||||
bb.9.bb37:
|
||||
successors: %bb.10.bb37(0x80000000)
|
||||
liveins: %ebp, %esi, %rbx, %r12, %r13, %r14, %r15
|
||||
|
||||
%cl = MOV8rr %r13b, implicit killed %r13, implicit-def %rcx
|
||||
|
||||
bb.10.bb37:
|
||||
successors: %bb.11.bb51.loopexit(0x00000800), %bb.4.bb7(0x7ffff800)
|
||||
liveins: %ebp, %esi, %rbx, %rcx, %r12, %r14, %r15
|
||||
|
||||
%cl = KILL %cl, implicit killed %rcx
|
||||
%r15 = SAR64rCL killed %r15, implicit-def dead %eflags, implicit %cl
|
||||
MOV64mr %r12, 8, killed %r14, 0, _, killed %r15 :: (store 8 into %ir.tmp7)
|
||||
MOV64mi32 undef %rax, 1, _, 0, _, 0 :: (store 8 into `i64* undef`)
|
||||
%eax = LEA64_32r %rbx, 1, _, 1, _
|
||||
%ecx = MOV32ri 6
|
||||
CMP32ri %eax, 15141, implicit-def %eflags
|
||||
%xmm0 = MOVSDrm %rsp, 1, _, 40, _ :: (load 8 from %stack.4)
|
||||
JL_1 %bb.4.bb7, implicit %eflags
|
||||
|
||||
bb.11.bb51.loopexit:
|
||||
successors: %bb.12.bb51(0x80000000)
|
||||
liveins: %ebp, %rbx
|
||||
|
||||
%ebp = INC32r killed %ebp, implicit-def dead %eflags
|
||||
%ebx = INC32r %ebx, implicit-def dead %eflags, implicit killed %rbx, implicit-def %rbx
|
||||
%rax = MOV64ri %const.0
|
||||
%xmm0 = MOVSDrm killed %rax, 1, _, 0, _ :: (load 8 from constant-pool)
|
||||
|
||||
bb.12.bb51:
|
||||
liveins: %ebp, %rbx, %xmm0
|
||||
|
||||
MOV32mr %rsp, 1, _, 24, _, %ebx, implicit killed %rbx :: (store 4 into %stack.0, align 8)
|
||||
MOV32mr %rsp, 1, _, 16, _, killed %ebp :: (store 4 into %stack.1, align 8)
|
||||
MOVSDmr %rsp, 1, _, 8, _, killed %xmm0 :: (store 8 into %stack.2)
|
||||
%rax = MOV64ri @wobble
|
||||
%edi = MOV32ri -121
|
||||
STATEPOINT 2882400000, 0, 1, killed %rax, %edi, 2, 0, 2, 0, 2, 38, 2, 1, 2, 0, 2, 270, 2, 4, 2, 12, 2, 0, 2, 11, 2, 4278124286, 2, 99, 2, 0, 2, 10, 1, 8, %rsp, 24, 2, 6, 2, 4278124286, 2, 99, 2, 0, 2, 99, 2, 0, 2, 10, 1, 8, %rsp, 16, 2, 10, 2, 4278124286, 2, 99, 2, 0, 2, 7, 1, 8, %rsp, 8, 2, 99, 2, 0, 2, 7, 2, 4278124286, 2, 99, 2, 0, 2, 13, 2, 4278124286, 2, 99, 2, 0, 2, 99, 2, 0, csr_64, implicit-def %rsp :: (volatile load 8 from %stack.0), (volatile load 8 from %stack.1), (volatile load 8 from %stack.2)
|
||||
|
||||
bb.13.bb59:
|
||||
%rax = MOV64ri @wobble
|
||||
%edi = MOV32ri 8
|
||||
STATEPOINT 2882400000, 0, 1, killed %rax, %edi, 2, 0, 2, 0, 2, 38, 2, 1, 2, 0, 2, 123, 2, 4, 2, 12, 2, 0, 2, 13, 2, 0, 2, 99, 2, 4278124286, 2, 13, 2, 0, 2, 10, 2, 4278124286, 2, 99, 2, 4278124286, 2, 99, 2, 4278124286, 2, 99, 2, 4278124286, 2, 99, 2, 0, 2, 99, 2, 4278124286, 2, 99, 2, 4278124286, 2, 99, 2, 0, 2, 99, 2, 4278124286, 2, 99, 2, 0, 2, 13, 2, 0, 2, 99, 2, 4278124286, 2, 99, 2, 0, csr_64, implicit-def %rsp
|
||||
|
||||
...
|
||||
Loading…
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Reference in New Issue
Block a user