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AMDGPU: Change DivergenceAnalysis for function arguments

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Stop assuming all functions are kernels.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300719 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Matt Arsenault 2017-04-19 17:42:34 +00:00
parent d6b4b10a39
commit 610621c4ba
3 changed files with 780 additions and 598 deletions
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25
lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
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@ -426,16 +426,23 @@ static bool isArgPassedInSGPR(const Argument *A) {
const Function *F = A->getParent(); const Function *F = A->getParent();
// Arguments to compute shaders are never a source of divergence. // Arguments to compute shaders are never a source of divergence.
if (!AMDGPU::isShader(F->getCallingConv())) CallingConv::ID CC = F->getCallingConv();
switch (CC) {
case CallingConv::AMDGPU_KERNEL:
case CallingConv::SPIR_KERNEL:
return true; return true;
case CallingConv::AMDGPU_VS:
// For non-compute shaders, SGPR inputs are marked with either inreg or byval. case CallingConv::AMDGPU_GS:
if (F->getAttributes().hasParamAttribute(A->getArgNo(), Attribute::InReg) || case CallingConv::AMDGPU_PS:
F->getAttributes().hasParamAttribute(A->getArgNo(), Attribute::ByVal)) case CallingConv::AMDGPU_CS:
return true; // For non-compute shaders, SGPR inputs are marked with either inreg or byval.
// Everything else is in VGPRs.
// Everything else is in VGPRs. return F->getAttributes().hasParamAttribute(A->getArgNo(), Attribute::InReg) ||
return false; F->getAttributes().hasParamAttribute(A->getArgNo(), Attribute::ByVal);
default:
// TODO: Should calls support inreg for SGPR inputs?
return false;
}
} }
/// ///

27
test/Analysis/DivergenceAnalysis/AMDGPU/kernel-args.ll
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@ -1,5 +1,6 @@
; RUN: opt %s -mtriple amdgcn-- -analyze -divergence | FileCheck %s ; RUN: opt %s -mtriple amdgcn-- -analyze -divergence | FileCheck %s
; CHECK-LABEL: Printing analysis 'Divergence Analysis' for function 'test_amdgpu_ps':
; CHECK: DIVERGENT: ; CHECK: DIVERGENT:
; CHECK-NOT: %arg0 ; CHECK-NOT: %arg0
; CHECK-NOT: %arg1 ; CHECK-NOT: %arg1
@ -9,7 +10,31 @@
; CHECK: DIVERGENT: float %arg5 ; CHECK: DIVERGENT: float %arg5
; CHECK: DIVERGENT: i32 %arg6 ; CHECK: DIVERGENT: i32 %arg6
define amdgpu_ps void @main([4 x <16 x i8>] addrspace(2)* byval %arg0, float inreg %arg1, i32 inreg %arg2, <2 x i32> %arg3, <3 x i32> %arg4, float %arg5, i32 %arg6) #0 { define amdgpu_ps void @test_amdgpu_ps([4 x <16 x i8>] addrspace(2)* byval %arg0, float inreg %arg1, i32 inreg %arg2, <2 x i32> %arg3, <3 x i32> %arg4, float %arg5, i32 %arg6) #0 {
ret void
}
; CHECK-LABEL: Printing analysis 'Divergence Analysis' for function 'test_amdgpu_kernel':
; CHECK-NOT: %arg0
; CHECK-NOT: %arg1
; CHECK-NOT: %arg2
; CHECK-NOT: %arg3
; CHECK-NOT: %arg4
; CHECK-NOT: %arg5
; CHECK-NOT: %arg6
define amdgpu_kernel void @test_amdgpu_kernel([4 x <16 x i8>] addrspace(2)* byval %arg0, float inreg %arg1, i32 inreg %arg2, <2 x i32> %arg3, <3 x i32> %arg4, float %arg5, i32 %arg6) #0 {
ret void
}
; CHECK-LABEL: Printing analysis 'Divergence Analysis' for function 'test_c':
; CHECK: DIVERGENT:
; CHECK: DIVERGENT:
; CHECK: DIVERGENT:
; CHECK: DIVERGENT:
; CHECK: DIVERGENT:
; CHECK: DIVERGENT:
; CHECK: DIVERGENT:
define void @test_c([4 x <16 x i8>] addrspace(2)* byval %arg0, float inreg %arg1, i32 inreg %arg2, <2 x i32> %arg3, <3 x i32> %arg4, float %arg5, i32 %arg6) #0 {
ret void ret void
} }

1326
test/CodeGen/AMDGPU/amdgpu-codegenprepare-i16-to-i32.ll
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