From 617742b1b8b7fbb07b4ab5db7c292bff78d709f6 Mon Sep 17 00:00:00 2001
From: Chris Lattner <sabre@nondot.org>
Date: Fri, 14 Oct 2005 22:44:13 +0000
Subject: [PATCH] Nuke PowerPCInstrFormats.h, its contents are dead.  Remove
 the definitions from the .td file that correspond to it

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23736 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/PowerPC/PPCAsmPrinter.cpp     |  7 +++
 lib/Target/PowerPC/PPCBranchSelector.cpp |  1 -
 lib/Target/PowerPC/PPCISelPattern.cpp    |  2 +-
 lib/Target/PowerPC/PPCInstrFormats.td    | 28 ------------
 lib/Target/PowerPC/PPCInstrInfo.h        |  5 ++-
 lib/Target/PowerPC/PowerPCInstrInfo.h    | 55 ------------------------
 6 files changed, 11 insertions(+), 87 deletions(-)
 delete mode 100644 lib/Target/PowerPC/PowerPCInstrInfo.h

diff --git a/lib/Target/PowerPC/PPCAsmPrinter.cpp b/lib/Target/PowerPC/PPCAsmPrinter.cpp
index ee428f9b1bc..6073d6031ee 100644
--- a/lib/Target/PowerPC/PPCAsmPrinter.cpp
+++ b/lib/Target/PowerPC/PPCAsmPrinter.cpp
@@ -342,6 +342,13 @@ void PowerPCAsmPrinter::printOp(const MachineOperand &MO, bool IsCallOp) {
 ///
 void PowerPCAsmPrinter::printMachineInstruction(const MachineInstr *MI) {
   ++EmittedInsts;
+
+/// NOTE: THIS SHOULD NEVER BE CHECKED IN.  STAY LOCAL IN CHRIS'S TREE.
+  if (0 && MI->getOpcode() == PPC::OR)
+    assert((MI->getOperand(0).getReg() != MI->getOperand(1).getReg() ||
+           MI->getOperand(2).getReg() != MI->getOperand(1).getReg()) &&
+  "noop copy emitted!");
+
   // Check for slwi/srwi mnemonics.
   if (MI->getOpcode() == PPC::RLWINM) {
     bool FoundMnemonic = false;
diff --git a/lib/Target/PowerPC/PPCBranchSelector.cpp b/lib/Target/PowerPC/PPCBranchSelector.cpp
index 6e0e36f0a1d..4286d8a14e9 100644
--- a/lib/Target/PowerPC/PPCBranchSelector.cpp
+++ b/lib/Target/PowerPC/PPCBranchSelector.cpp
@@ -18,7 +18,6 @@
 #define DEBUG_TYPE "bsel"
 #include "PowerPC.h"
 #include "PowerPCInstrBuilder.h"
-#include "PowerPCInstrInfo.h"
 #include "PPC32InstrInfo.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"
 #include "llvm/Support/Debug.h"
diff --git a/lib/Target/PowerPC/PPCISelPattern.cpp b/lib/Target/PowerPC/PPCISelPattern.cpp
index 5bae7c9280c..3cca36220b0 100644
--- a/lib/Target/PowerPC/PPCISelPattern.cpp
+++ b/lib/Target/PowerPC/PPCISelPattern.cpp
@@ -15,7 +15,7 @@
 
 #include "PowerPC.h"
 #include "PowerPCInstrBuilder.h"
-#include "PowerPCInstrInfo.h"
+#include "PPC32InstrInfo.h"
 #include "PPC32TargetMachine.h"
 #include "PPC32ISelLowering.h"
 #include "llvm/Constants.h"
diff --git a/lib/Target/PowerPC/PPCInstrFormats.td b/lib/Target/PowerPC/PPCInstrFormats.td
index 72fa0eb1343..880a66a99e2 100644
--- a/lib/Target/PowerPC/PPCInstrFormats.td
+++ b/lib/Target/PowerPC/PPCInstrFormats.td
@@ -10,34 +10,6 @@
 //
 //===----------------------------------------------------------------------===//
 
-class Format<bits<5> val> {
-  bits<5> Value = val;
-}
-
-def Pseudo: Format<0>;
-def Gpr : Format<1>;
-def Gpr0 : Format<2>;
-def Simm16 : Format<3>;
-def PCRelimm24 : Format<5>;
-def Imm24 : Format<6>;
-def Imm5 : Format<7>;
-def PCRelimm14 : Format<8>;
-def Imm14 : Format<9>;
-def Imm2 : Format<10>;
-def Crf : Format<11>;
-def Imm3 : Format<12>;
-def Imm1 : Format<13>;
-def Fpr : Format<14>;
-def Imm4 : Format<15>;
-def Imm8 : Format<16>;
-def Disimm16 : Format<17>;
-def Disimm14 : Format<18>;
-def Spr : Format<19>;
-def Sgr : Format<20>;
-def Imm15 : Format<21>;
-def Vpr : Format<22>;
-def Imm6 : Format<23>;
-
 //===----------------------------------------------------------------------===//
 //
 // PowerPC instruction formats
diff --git a/lib/Target/PowerPC/PPCInstrInfo.h b/lib/Target/PowerPC/PPCInstrInfo.h
index bbc0be4cd56..8a230897e79 100644
--- a/lib/Target/PowerPC/PPCInstrInfo.h
+++ b/lib/Target/PowerPC/PPCInstrInfo.h
@@ -14,11 +14,12 @@
 #ifndef POWERPC32_INSTRUCTIONINFO_H
 #define POWERPC32_INSTRUCTIONINFO_H
 
-#include "PowerPCInstrInfo.h"
+#include "PowerPC.h"
+#include "llvm/Target/TargetInstrInfo.h"
 #include "PPC32RegisterInfo.h"
 
 namespace llvm {
-
+  
 class PPC32InstrInfo : public TargetInstrInfo {
   const PPC32RegisterInfo RI;
 public:
diff --git a/lib/Target/PowerPC/PowerPCInstrInfo.h b/lib/Target/PowerPC/PowerPCInstrInfo.h
deleted file mode 100644
index e1ab2511918..00000000000
--- a/lib/Target/PowerPC/PowerPCInstrInfo.h
+++ /dev/null
@@ -1,55 +0,0 @@
-//===- PowerPCInstrInfo.h - PowerPC Instruction Information -----*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file was developed by the LLVM research group and is distributed under
-// the University of Illinois Open Source License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file contains the PowerPC implementation of the TargetInstrInfo class.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef POWERPC_INSTRUCTIONINFO_H
-#define POWERPC_INSTRUCTIONINFO_H
-
-#include "PowerPC.h"
-#include "llvm/Target/TargetInstrInfo.h"
-
-namespace llvm {
-  namespace PPCII {
-    enum {
-      VMX   = 1 << 0,
-      PPC64 = 1 << 1,
-    };
-
-    enum {
-      None = 0,
-      Gpr = 1,
-      Gpr0 = 2,
-      Simm16 = 3,
-      Zimm16 = 4,
-      PCRelimm24 = 5,
-      Imm24 = 6,
-      Imm5 = 7,
-      PCRelimm14 = 8,
-      Imm14 = 9,
-      Imm2 = 10,
-      Crf = 11,
-      Imm3 = 12,
-      Imm1 = 13,
-      Fpr = 14,
-      Imm4 = 15,
-      Imm8 = 16,
-      Disimm16 = 17,
-      Disimm14 = 18,
-      Spr = 19,
-      Sgr = 20,
-      Imm15 = 21,
-      Vpr = 22
-    };
-  }
-}
-
-#endif